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[PATCH v2 1/5] target/arm: fix typo in cpu.h ID_AA64PFR1 field name
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From: |
Leif Lindholm |
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Subject: |
[PATCH v2 1/5] target/arm: fix typo in cpu.h ID_AA64PFR1 field name |
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Date: |
Tue, 15 Dec 2020 11:48:24 +0000 |
SBSS -> SSBS
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
---
target/arm/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 7e6c881a7e..5e3cf77ec7 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1883,7 +1883,7 @@ FIELD(ID_AA64PFR0, RAS, 28, 4)
FIELD(ID_AA64PFR0, SVE, 32, 4)
FIELD(ID_AA64PFR1, BT, 0, 4)
-FIELD(ID_AA64PFR1, SBSS, 4, 4)
+FIELD(ID_AA64PFR1, SSBS, 4, 4)
FIELD(ID_AA64PFR1, MTE, 8, 4)
FIELD(ID_AA64PFR1, RAS_FRAC, 12, 4)
--
2.20.1
- [PATCH v2 0/5] target/arm: various changes to cpu.h, Leif Lindholm, 2020/12/15
- [PATCH v2 3/5] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h, Leif Lindholm, 2020/12/15
- [PATCH v2 4/5] target/arm: add aarch64 ID register fields to cpu.h, Leif Lindholm, 2020/12/15
- [PATCH v2 2/5] target/arm: make ARMCPU.clidr 64-bit, Leif Lindholm, 2020/12/15
- [PATCH v2 1/5] target/arm: fix typo in cpu.h ID_AA64PFR1 field name,
Leif Lindholm <=
- [PATCH v2 5/5] target/arm: add aarch32 ID register fields to cpu.h, Leif Lindholm, 2020/12/15
- Re: [PATCH v2 0/5] target/arm: various changes to cpu.h, Peter Maydell, 2020/12/15