[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 01/11] target/mips/mips-defs: Reorder CPU_MIPS5 definition
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 01/11] target/mips/mips-defs: Reorder CPU_MIPS5 definition |
Date: |
Wed, 16 Dec 2020 14:43:18 +0100 |
Move CPU_MIPS5 after CPU_MIPS4 :)
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/mips-defs.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h
index 805034b8956..f4d76e562d1 100644
--- a/target/mips/mips-defs.h
+++ b/target/mips/mips-defs.h
@@ -70,13 +70,12 @@
#define CPU_MIPS2 (CPU_MIPS1 | ISA_MIPS2)
#define CPU_MIPS3 (CPU_MIPS2 | ISA_MIPS3)
#define CPU_MIPS4 (CPU_MIPS3 | ISA_MIPS4)
+#define CPU_MIPS5 (CPU_MIPS4 | ISA_MIPS5)
#define CPU_VR54XX (CPU_MIPS4 | INSN_VR54XX)
#define CPU_R5900 (CPU_MIPS3 | INSN_R5900)
#define CPU_LOONGSON2E (CPU_MIPS3 | INSN_LOONGSON2E)
#define CPU_LOONGSON2F (CPU_MIPS3 | INSN_LOONGSON2F | ASE_LMMI)
-#define CPU_MIPS5 (CPU_MIPS4 | ISA_MIPS5)
-
/* MIPS Technologies "Release 1" */
#define CPU_MIPS32 (CPU_MIPS2 | ISA_MIPS32)
#define CPU_MIPS64 (CPU_MIPS5 | CPU_MIPS32 | ISA_MIPS64)
--
2.26.2
- [PATCH 00/11] target/mips/mips-defs: Simplify ISA definitions, Philippe Mathieu-Daudé, 2020/12/16
- [PATCH 01/11] target/mips/mips-defs: Reorder CPU_MIPS5 definition,
Philippe Mathieu-Daudé <=
- [PATCH 02/11] target/mips/mips-defs: Use ISA_MIPS3 for ISA_MIPS64, Philippe Mathieu-Daudé, 2020/12/16
- [PATCH 04/11] target/mips/mips-defs: Use ISA_MIPS32R3 definition to check Release 3, Philippe Mathieu-Daudé, 2020/12/16
- [PATCH 05/11] target/mips/mips-defs: Use ISA_MIPS32R5 definition to check Release 5, Philippe Mathieu-Daudé, 2020/12/16
- [PATCH 06/11] target/mips/mips-defs: Use ISA_MIPS32R6 definition to check Release 6, Philippe Mathieu-Daudé, 2020/12/16
- [PATCH 03/11] target/mips/mips-defs: Use ISA_MIPS32R2 definition to check Release 2, Philippe Mathieu-Daudé, 2020/12/16