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[Bug 1913344] Re: Exynos4210 UART peripheral data loss
From: |
Iris Johnson |
Subject: |
[Bug 1913344] Re: Exynos4210 UART peripheral data loss |
Date: |
Mon, 01 Mar 2021 19:07:49 -0000 |
** Changed in: qemu
Status: New => Fix Committed
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https://bugs.launchpad.net/bugs/1913344
Title:
Exynos4210 UART peripheral data loss
Status in QEMU:
Fix Committed
Bug description:
Currently the Exynos4210 UART (hw/char/exynos4210_uart.c) incorrectly
reports however many empty bytes are available in the FIFO when
queried for receive capacity. However this peripheral supports a
polled mode where only a single byte can be submitted at a time and
the FIFO is unused, meaning that in polled mode data is lost since
it's written into the FIFO and the polling code in FIFO disabled mode
only returns the value in the RX data register.
Even worse, potentially enabling the FIFO without a FIFO reset will
create a weird situation where data is already in the FIFO whenever
data came in faster than the polling could pick it up (which is
basically always).
This change obscured the issue in
https://bugs.launchpad.net/qemu/+bug/1913341, which instead presented
as strange data loss until I locally resolved this issue.
I have a patch ready for the bug and will submit it later today, I'm
just filing for clarity.
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