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[RFC v3 01/23] target/arm: move translate modules to tcg/
From: |
Claudio Fontana |
Subject: |
[RFC v3 01/23] target/arm: move translate modules to tcg/ |
Date: |
Wed, 3 Mar 2021 12:40:31 +0100 |
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/{ => tcg}/translate-a64.h | 0
target/arm/{ => tcg}/translate.h | 0
target/arm/{ => tcg}/a32-uncond.decode | 0
target/arm/{ => tcg}/a32.decode | 0
target/arm/{ => tcg}/m-nocp.decode | 0
target/arm/{ => tcg}/neon-dp.decode | 0
target/arm/{ => tcg}/neon-ls.decode | 0
target/arm/{ => tcg}/neon-shared.decode | 0
target/arm/{ => tcg}/sve.decode | 0
target/arm/{ => tcg}/t16.decode | 0
target/arm/{ => tcg}/t32.decode | 0
target/arm/{ => tcg}/vfp-uncond.decode | 0
target/arm/{ => tcg}/vfp.decode | 0
target/arm/{ => tcg}/translate-a64.c | 0
target/arm/{ => tcg}/translate-sve.c | 0
target/arm/{ => tcg}/translate.c | 0
target/arm/{ => tcg}/translate-neon.c.inc | 0
target/arm/{ => tcg}/translate-vfp.c.inc | 0
target/arm/meson.build | 20 ++-----------------
target/arm/tcg/meson.build | 24 +++++++++++++++++++++++
20 files changed, 26 insertions(+), 18 deletions(-)
rename target/arm/{ => tcg}/translate-a64.h (100%)
rename target/arm/{ => tcg}/translate.h (100%)
rename target/arm/{ => tcg}/a32-uncond.decode (100%)
rename target/arm/{ => tcg}/a32.decode (100%)
rename target/arm/{ => tcg}/m-nocp.decode (100%)
rename target/arm/{ => tcg}/neon-dp.decode (100%)
rename target/arm/{ => tcg}/neon-ls.decode (100%)
rename target/arm/{ => tcg}/neon-shared.decode (100%)
rename target/arm/{ => tcg}/sve.decode (100%)
rename target/arm/{ => tcg}/t16.decode (100%)
rename target/arm/{ => tcg}/t32.decode (100%)
rename target/arm/{ => tcg}/vfp-uncond.decode (100%)
rename target/arm/{ => tcg}/vfp.decode (100%)
rename target/arm/{ => tcg}/translate-a64.c (100%)
rename target/arm/{ => tcg}/translate-sve.c (100%)
rename target/arm/{ => tcg}/translate.c (100%)
rename target/arm/{ => tcg}/translate-neon.c.inc (100%)
rename target/arm/{ => tcg}/translate-vfp.c.inc (100%)
create mode 100644 target/arm/tcg/meson.build
diff --git a/target/arm/translate-a64.h b/target/arm/tcg/translate-a64.h
similarity index 100%
rename from target/arm/translate-a64.h
rename to target/arm/tcg/translate-a64.h
diff --git a/target/arm/translate.h b/target/arm/tcg/translate.h
similarity index 100%
rename from target/arm/translate.h
rename to target/arm/tcg/translate.h
diff --git a/target/arm/a32-uncond.decode b/target/arm/tcg/a32-uncond.decode
similarity index 100%
rename from target/arm/a32-uncond.decode
rename to target/arm/tcg/a32-uncond.decode
diff --git a/target/arm/a32.decode b/target/arm/tcg/a32.decode
similarity index 100%
rename from target/arm/a32.decode
rename to target/arm/tcg/a32.decode
diff --git a/target/arm/m-nocp.decode b/target/arm/tcg/m-nocp.decode
similarity index 100%
rename from target/arm/m-nocp.decode
rename to target/arm/tcg/m-nocp.decode
diff --git a/target/arm/neon-dp.decode b/target/arm/tcg/neon-dp.decode
similarity index 100%
rename from target/arm/neon-dp.decode
rename to target/arm/tcg/neon-dp.decode
diff --git a/target/arm/neon-ls.decode b/target/arm/tcg/neon-ls.decode
similarity index 100%
rename from target/arm/neon-ls.decode
rename to target/arm/tcg/neon-ls.decode
diff --git a/target/arm/neon-shared.decode b/target/arm/tcg/neon-shared.decode
similarity index 100%
rename from target/arm/neon-shared.decode
rename to target/arm/tcg/neon-shared.decode
diff --git a/target/arm/sve.decode b/target/arm/tcg/sve.decode
similarity index 100%
rename from target/arm/sve.decode
rename to target/arm/tcg/sve.decode
diff --git a/target/arm/t16.decode b/target/arm/tcg/t16.decode
similarity index 100%
rename from target/arm/t16.decode
rename to target/arm/tcg/t16.decode
diff --git a/target/arm/t32.decode b/target/arm/tcg/t32.decode
similarity index 100%
rename from target/arm/t32.decode
rename to target/arm/tcg/t32.decode
diff --git a/target/arm/vfp-uncond.decode b/target/arm/tcg/vfp-uncond.decode
similarity index 100%
rename from target/arm/vfp-uncond.decode
rename to target/arm/tcg/vfp-uncond.decode
diff --git a/target/arm/vfp.decode b/target/arm/tcg/vfp.decode
similarity index 100%
rename from target/arm/vfp.decode
rename to target/arm/tcg/vfp.decode
diff --git a/target/arm/translate-a64.c b/target/arm/tcg/translate-a64.c
similarity index 100%
rename from target/arm/translate-a64.c
rename to target/arm/tcg/translate-a64.c
diff --git a/target/arm/translate-sve.c b/target/arm/tcg/translate-sve.c
similarity index 100%
rename from target/arm/translate-sve.c
rename to target/arm/tcg/translate-sve.c
diff --git a/target/arm/translate.c b/target/arm/tcg/translate.c
similarity index 100%
rename from target/arm/translate.c
rename to target/arm/tcg/translate.c
diff --git a/target/arm/translate-neon.c.inc
b/target/arm/tcg/translate-neon.c.inc
similarity index 100%
rename from target/arm/translate-neon.c.inc
rename to target/arm/tcg/translate-neon.c.inc
diff --git a/target/arm/translate-vfp.c.inc b/target/arm/tcg/translate-vfp.c.inc
similarity index 100%
rename from target/arm/translate-vfp.c.inc
rename to target/arm/tcg/translate-vfp.c.inc
diff --git a/target/arm/meson.build b/target/arm/meson.build
index a96af5ee1b..229ec7fa11 100644
--- a/target/arm/meson.build
+++ b/target/arm/meson.build
@@ -1,19 +1,4 @@
-gen = [
- decodetree.process('sve.decode', extra_args: '--decode=disas_sve'),
- decodetree.process('neon-shared.decode', extra_args:
'--static-decode=disas_neon_shared'),
- decodetree.process('neon-dp.decode', extra_args:
'--static-decode=disas_neon_dp'),
- decodetree.process('neon-ls.decode', extra_args:
'--static-decode=disas_neon_ls'),
- decodetree.process('vfp.decode', extra_args: '--static-decode=disas_vfp'),
- decodetree.process('vfp-uncond.decode', extra_args:
'--static-decode=disas_vfp_uncond'),
- decodetree.process('m-nocp.decode', extra_args:
'--static-decode=disas_m_nocp'),
- decodetree.process('a32.decode', extra_args: '--static-decode=disas_a32'),
- decodetree.process('a32-uncond.decode', extra_args:
'--static-decode=disas_a32_uncond'),
- decodetree.process('t32.decode', extra_args: '--static-decode=disas_t32'),
- decodetree.process('t16.decode', extra_args: ['-w', '16',
'--static-decode=disas_t16']),
-]
-
arm_ss = ss.source_set()
-arm_ss.add(gen)
arm_ss.add(files(
'cpu.c',
'crypto_helper.c',
@@ -25,7 +10,6 @@ arm_ss.add(files(
'neon_helper.c',
'op_helper.c',
'tlb_helper.c',
- 'translate.c',
'vec_helper.c',
'vfp_helper.c',
'cpu_tcg.c',
@@ -41,8 +25,6 @@ arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
'mte_helper.c',
'pauth_helper.c',
'sve_helper.c',
- 'translate-a64.c',
- 'translate-sve.c',
))
arm_softmmu_ss = ss.source_set()
@@ -55,6 +37,8 @@ arm_softmmu_ss.add(files(
))
arm_user_ss = ss.source_set()
+subdir('tcg')
+
target_arch += {'arm': arm_ss}
target_softmmu_arch += {'arm': arm_softmmu_ss}
target_user_arch += {'arm': arm_user_ss}
diff --git a/target/arm/tcg/meson.build b/target/arm/tcg/meson.build
new file mode 100644
index 0000000000..5a7c9b95d8
--- /dev/null
+++ b/target/arm/tcg/meson.build
@@ -0,0 +1,24 @@
+gen = [
+ decodetree.process('sve.decode', extra_args: '--decode=disas_sve'),
+ decodetree.process('neon-shared.decode', extra_args:
'--static-decode=disas_neon_shared'),
+ decodetree.process('neon-dp.decode', extra_args:
'--static-decode=disas_neon_dp'),
+ decodetree.process('neon-ls.decode', extra_args:
'--static-decode=disas_neon_ls'),
+ decodetree.process('vfp.decode', extra_args: '--static-decode=disas_vfp'),
+ decodetree.process('vfp-uncond.decode', extra_args:
'--static-decode=disas_vfp_uncond'),
+ decodetree.process('m-nocp.decode', extra_args:
'--static-decode=disas_m_nocp'),
+ decodetree.process('a32.decode', extra_args: '--static-decode=disas_a32'),
+ decodetree.process('a32-uncond.decode', extra_args:
'--static-decode=disas_a32_uncond'),
+ decodetree.process('t32.decode', extra_args: '--static-decode=disas_t32'),
+ decodetree.process('t16.decode', extra_args: ['-w', '16',
'--static-decode=disas_t16']),
+]
+
+arm_ss.add(gen)
+
+arm_ss.add(files(
+ 'translate.c',
+))
+
+arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
+ 'translate-a64.c',
+ 'translate-sve.c',
+))
--
2.26.2
- [RFC v3 00/23] arm cleanup experiment for kvm-only build, Claudio Fontana, 2021/03/03
- [RFC v3 03/23] arm: tcg: only build under CONFIG_TCG, Claudio Fontana, 2021/03/03
- [RFC v3 02/23] target/arm: move helpers to tcg/, Claudio Fontana, 2021/03/03
- [RFC v3 05/23] target/arm: only build psci for TCG, Claudio Fontana, 2021/03/03
- [RFC v3 06/23] target/arm: split off cpu-sysemu.c, Claudio Fontana, 2021/03/03
- [RFC v3 07/23] target/arm: move physical address translation to cpu-mmu, Claudio Fontana, 2021/03/03
- [RFC v3 10/23] target/arm: only perform TCG cpu and machine inits if TCG enabled, Claudio Fontana, 2021/03/03
- [RFC v3 01/23] target/arm: move translate modules to tcg/,
Claudio Fontana <=
- [RFC v3 11/23] target/arm: kvm: add stubs for some helpers, Claudio Fontana, 2021/03/03
- [RFC v3 16/23] target/arm: move sve_zcr_len_for_el to common_cpu, Claudio Fontana, 2021/03/03
- [RFC v3 04/23] target/arm: tcg: add sysemu and user subsirs, Claudio Fontana, 2021/03/03
- [RFC v3 09/23] target/arm: move cpu definitions to common cpu module, Claudio Fontana, 2021/03/03
- [RFC v3 17/23] target/arm: move arm_sctlr away from tcg helpers, Claudio Fontana, 2021/03/03
- [RFC v3 14/23] target/arm: split vfp state setting from tcg helpers, Claudio Fontana, 2021/03/03
- [RFC v3 18/23] target/arm: move arm_cpu_list to common_cpu, Claudio Fontana, 2021/03/03
- [RFC v3 20/23] target/arm: split 32bit cpu models from cpu.c to cpu32.c, Claudio Fontana, 2021/03/03
- [RFC v3 19/23] target/arm: move aarch64_sync_32_to_64 (and vv) to cpu code, Claudio Fontana, 2021/03/03
- [RFC v3 23/23] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled(), Claudio Fontana, 2021/03/03