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Re: [PULL v2 00/49] target-arm queue
From: |
Peter Maydell |
Subject: |
Re: [PULL v2 00/49] target-arm queue |
Date: |
Mon, 8 Mar 2021 11:52:52 +0000 |
On Sat, 6 Mar 2021 at 13:51, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> v2: don't delete is_surface_bgr() definition, the ppc patches
> that drop use of it from sm501 haven't hit master yet.
I forgot about the "32 bit hosts don't allow guests to have 2GB
of RAM" thing; this minor fixup needs squashing into the 'add the
mps3-an524' patch. v3 coming up...
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -155,6 +155,16 @@ OBJECT_DECLARE_TYPE(MPS2TZMachineState,
MPS2TZMachineClass, MPS2TZ_MACHINE)
/* Slow 32Khz S32KCLK frequency in Hz */
#define S32KCLK_FRQ (32 * 1000)
+/*
+ * The MPS3 DDR is 2GiB, but on a 32-bit host QEMU doesn't permit
+ * emulation of that much guest RAM, so artificially make it smaller.
+ */
+#if HOST_LONG_BITS == 32
+#define MPS3_DDR_SIZE (1 * GiB)
+#else
+#define MPS3_DDR_SIZE (2 * GiB)
+#endif
+
static const uint32_t an505_oscclk[] = {
40000000,
24580000,
@@ -230,7 +240,7 @@ static const RAMInfo an524_raminfo[] = { {
}, {
.name = "DDR",
.base = 0x60000000,
- .size = 2 * GiB,
+ .size = MPS3_DDR_SIZE,
.mpc = 2,
.mrindex = -1,
}, {
thanks
-- PMM