[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[RFC v5 19/36] target/arm: move arm_sctlr away from tcg helpers
From: |
Claudio Fontana |
Subject: |
[RFC v5 19/36] target/arm: move arm_sctlr away from tcg helpers |
Date: |
Tue, 9 Mar 2021 15:25:27 +0100 |
this function is used for kvm too, add it to the
cpu-common module.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
---
target/arm/cpu-common.c | 11 +++++++++++
target/arm/tcg/helper.c | 11 -----------
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/target/arm/cpu-common.c b/target/arm/cpu-common.c
index 540793e4c0..dc7a5049a7 100644
--- a/target/arm/cpu-common.c
+++ b/target/arm/cpu-common.c
@@ -274,3 +274,14 @@ uint32_t sve_zcr_len_for_el(CPUARMState *env, int el)
}
/* #endif TARGET_AARCH64 , see matching comment above */
+
+uint64_t arm_sctlr(CPUARMState *env, int el)
+{
+ /* Only EL0 needs to be adjusted for EL1&0 or EL2&0. */
+ if (el == 0) {
+ ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, 0);
+ el = (mmu_idx == ARMMMUIdx_E20_0 || mmu_idx == ARMMMUIdx_SE20_0)
+ ? 2 : 1;
+ }
+ return env->cp15.sctlr_el[el];
+}
diff --git a/target/arm/tcg/helper.c b/target/arm/tcg/helper.c
index 5c5c916279..5878a0515c 100644
--- a/target/arm/tcg/helper.c
+++ b/target/arm/tcg/helper.c
@@ -1743,17 +1743,6 @@ void arm_cpu_do_interrupt(CPUState *cs)
}
#endif /* !CONFIG_USER_ONLY */
-uint64_t arm_sctlr(CPUARMState *env, int el)
-{
- /* Only EL0 needs to be adjusted for EL1&0 or EL2&0. */
- if (el == 0) {
- ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, 0);
- el = (mmu_idx == ARMMMUIdx_E20_0 || mmu_idx == ARMMMUIdx_SE20_0)
- ? 2 : 1;
- }
- return env->cp15.sctlr_el[el];
-}
-
/* Returns true if the stage 1 translation regime is using LPAE format page
* tables. Used when raising alignment exceptions, whose FSR changes depending
* on whether the long or short descriptor format is in use. */
--
2.26.2
- [RFC v5 05/36] target/arm: only build psci for TCG, (continued)
- [RFC v5 05/36] target/arm: only build psci for TCG, Claudio Fontana, 2021/03/09
- [RFC v5 06/36] target/arm: split off cpu-sysemu.c, Claudio Fontana, 2021/03/09
- [RFC v5 07/36] target/arm: move physical address translation to cpu-mmu, Claudio Fontana, 2021/03/09
- [RFC v5 08/36] target/arm: cpu-mmu: fix comment style, Claudio Fontana, 2021/03/09
- [RFC v5 10/36] target/arm: cpregs: fix style (mostly just comments), Claudio Fontana, 2021/03/09
- [RFC v5 11/36] target/arm: move cpu definitions to common cpu module, Claudio Fontana, 2021/03/09
- [RFC v5 12/36] target/arm: only perform TCG cpu and machine inits if TCG enabled, Claudio Fontana, 2021/03/09
- [RFC v5 13/36] target/arm: kvm: add stubs for some helpers, Claudio Fontana, 2021/03/09
- [RFC v5 15/36] target/arm: add temporary stub for arm_rebuild_hflags, Claudio Fontana, 2021/03/09
- [RFC v5 14/36] target/arm: move cpsr_read, cpsr_write to cpu_common, Claudio Fontana, 2021/03/09
- [RFC v5 19/36] target/arm: move arm_sctlr away from tcg helpers,
Claudio Fontana <=
- [RFC v5 09/36] target/arm: split cpregs from tcg/helper.c, Claudio Fontana, 2021/03/09
- [RFC v5 23/36] target/arm: move sve_exception_el out of TCG helpers, Claudio Fontana, 2021/03/09
- [RFC v5 16/36] target/arm: split vfp state setting from tcg helpers, Claudio Fontana, 2021/03/09
- [RFC v5 20/36] target/arm: move arm_cpu_list to common_cpu, Claudio Fontana, 2021/03/09
- [RFC v5 17/36] target/arm: move arm_mmu_idx* to cpu-mmu, Claudio Fontana, 2021/03/09
- [RFC v5 26/36] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled(), Claudio Fontana, 2021/03/09
- [RFC v5 18/36] target/arm: move sve_zcr_len_for_el to common_cpu, Claudio Fontana, 2021/03/09
- [RFC v5 29/36] target/arm: cleanup cpu includes, Claudio Fontana, 2021/03/09
- [RFC v5 21/36] target/arm: move aarch64_sync_32_to_64 (and vv) to cpu code, Claudio Fontana, 2021/03/09
- [RFC v5 22/36] target/arm: split 32bit cpu models from cpu.c to cpu32.c, Claudio Fontana, 2021/03/09