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Re: Question about edge-triggered interrupt
From: |
Peter Maydell |
Subject: |
Re: Question about edge-triggered interrupt |
Date: |
Fri, 12 Mar 2021 10:05:02 +0000 |
On Fri, 12 Mar 2021 at 09:20, LIU Zhiwei <zhiwei_liu@c-sky.com> wrote:
>
> Thanks very much. By the way, in my opinion, the signal line in GICv2
> solution is
> something like "QEMU-specific weirdness" .
No, for the GICv2 that really is how the hardware works -- the interrupt
controller talks to the CPU via the classic IRQ and FIQ lines, and the
CPU itself has no particular access to what the interrupt controller
itself is doing. For GICv3 you have more of a point...
thanks
-- PMM
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- Re: Question about edge-triggered interrupt, Peter Maydell, 2021/03/11
- Re: Question about edge-triggered interrupt, LIU Zhiwei, 2021/03/11
- Re: Question about edge-triggered interrupt, Peter Maydell, 2021/03/11
- Re: Question about edge-triggered interrupt, LIU Zhiwei, 2021/03/11
- Re: Question about edge-triggered interrupt, Peter Maydell, 2021/03/11
- Re: Question about edge-triggered interrupt, LIU Zhiwei, 2021/03/12
- Re: Question about edge-triggered interrupt,
Peter Maydell <=
- Re: Question about edge-triggered interrupt, Alistair Francis, 2021/03/11
- Re: Question about edge-triggered interrupt, LIU Zhiwei, 2021/03/12