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[PATCH V3] target/riscv: Align the data type of reset vector address
From: |
Dylan Jhong |
Subject: |
[PATCH V3] target/riscv: Align the data type of reset vector address |
Date: |
Thu, 25 Mar 2021 17:41:50 +0800 |
Signed-off-by: Dylan Jhong <dylan@andestech.com>
Signed-off-by: Ruinland ChuanTzu Tsai <ruinland@andestech.com>
---
target/riscv/cpu.c | 6 +++++-
target/riscv/cpu.h | 2 +-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 7d6ed80f6b..8a5f18bcb0 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -137,7 +137,7 @@ static void set_feature(CPURISCVState *env, int feature)
env->features |= (1ULL << feature);
}
-static void set_resetvec(CPURISCVState *env, int resetvec)
+static void set_resetvec(CPURISCVState *env, target_ulong resetvec)
{
#ifndef CONFIG_USER_ONLY
env->resetvec = resetvec;
@@ -554,7 +554,11 @@ static Property riscv_cpu_properties[] = {
DEFINE_PROP_UINT16("elen", RISCVCPU, cfg.elen, 64),
DEFINE_PROP_BOOL("mmu", RISCVCPU, cfg.mmu, true),
DEFINE_PROP_BOOL("pmp", RISCVCPU, cfg.pmp, true),
+#if defined(TARGET_RISCV32)
+ DEFINE_PROP_UINT32("resetvec", RISCVCPU, cfg.resetvec, DEFAULT_RSTVEC),
+#elif defined(TARGET_RISCV64)
DEFINE_PROP_UINT64("resetvec", RISCVCPU, cfg.resetvec, DEFAULT_RSTVEC),
+#endif
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 0a33d387ba..d9d7891666 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -303,7 +303,7 @@ struct RISCVCPU {
uint16_t elen;
bool mmu;
bool pmp;
- uint64_t resetvec;
+ target_ulong resetvec;
} cfg;
};
--
2.17.1
- [PATCH V3] target/riscv: Align the data type of reset vector address,
Dylan Jhong <=