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RE: [PATCH 11/15] Hexagon (target/hexagon) circular addressing
From: |
Taylor Simpson |
Subject: |
RE: [PATCH 11/15] Hexagon (target/hexagon) circular addressing |
Date: |
Thu, 25 Mar 2021 17:37:05 +0000 |
> -----Original Message-----
> From: Richard Henderson <richard.henderson@linaro.org>
> Sent: Thursday, March 25, 2021 11:34 AM
> To: Taylor Simpson <tsimpson@quicinc.com>; qemu-devel@nongnu.org
> Cc: philmd@redhat.com; ale@rev.ng; Brian Cain <bcain@quicinc.com>
> Subject: Re: [PATCH 11/15] Hexagon (target/hexagon) circular addressing
>
> On 3/24/21 8:50 PM, Taylor Simpson wrote:
> > +/*
> > + * Many instructions will work with just macro redefinitions
> > + * with the caveat that they need a tmp variable to carry a
> > + * value between them.
> > + */
> > +#define fGEN_TCG_tmp(SHORTCODE) \
> > + do { \
> > + TCGv tmp = tcg_temp_new(); \
> > + SHORTCODE; \
> > + tcg_temp_free(tmp); \
> > + } while (0)
>
> Wow, this is awfully magical. I don't even see "tmp" referenced in the
> SHORTCODE. What's going on here?
Here's an example:L2_loadrub_pci
Semantics:{fEA_REG(RxV); fPM_CIRI(RxV,siV,MuV); fLOAD(1,1,u,EA,RdV);}
The need for tmp is inside the fPM_CIRI macro
#define fPM_CIRI(REG, IMM, MVAL) \
do { \
TCGv tcgv_siV = tcg_const_tl(siV); \
gen_helper_fcircadd(REG, REG, tcgv_siV, MuV, fREAD_CSREG(MuN)); \
tcg_temp_free(tcgv_siV); \
} while (0)
Notice the use of fREAD_CSREG
#define fREAD_CSREG(N) (READ_REG(tmp, HEX_REG_CS0 + N))
So, we're using tmp to carry the value read from the CS reg to the
gen_helper_fcircadd call.
I'll go ahead and move the create/free tmp inside the fPM_CIRI macro.
Thanks,
Taylor
- Re: [PATCH 09/15] Hexagon (target/hexagon) use softfloat for float-to-int conversions, (continued)
- [PATCH 06/15] Hexagon (target/hexagon) utility function changes, Taylor Simpson, 2021/03/24
- [PATCH 05/15] Hexagon (target/hexagon) change variables from int to bool when appropriate, Taylor Simpson, 2021/03/24
- [PATCH 02/15] Hexagon (target/hexagon) remove unnecessary inline directives, Taylor Simpson, 2021/03/24
- [PATCH 11/15] Hexagon (target/hexagon) circular addressing, Taylor Simpson, 2021/03/24
- [PATCH 15/15] Hexagon (target/hexagon) CABAC decode bin, Taylor Simpson, 2021/03/24
- [PATCH 13/15] Hexagon (target/hexagon) load and unpack bytes instructions, Taylor Simpson, 2021/03/24
- [PATCH 12/15] Hexagon (target/hexagon) bit reverse (brev) addressing, Taylor Simpson, 2021/03/24
- [PATCH 14/15] Hexagon (target/hexagon) load into shifted register instructions, Taylor Simpson, 2021/03/24
- [PATCH 01/15] Hexagon (target/hexagon) TCG generation cleanup, Taylor Simpson, 2021/03/24
- [PATCH 07/15] Hexagon (target/hexagon) use softfloat default NaN and tininess, Taylor Simpson, 2021/03/24