[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v4 cxl-2.0-doe 0/3] QEMU PCIe DOE for PCIe and CXL2.0
From: |
Chris Browy |
Subject: |
[PATCH v4 cxl-2.0-doe 0/3] QEMU PCIe DOE for PCIe and CXL2.0 |
Date: |
Wed, 31 Mar 2021 12:12:05 -0400 |
Version 4 patch series for PCIe DOE for PCIe and CXL 2.0 completes
all planned functionality.
Based on QEMU version:
https://gitlab.com/bwidawsk/qemu/-/tree/cxl-2.0v4
Summary of changes:
1: PCIe DOE support for Discovery
- Fix the alignment error in DOE config write
- Fix the interrupt disabling issue in DOE config write
- Naming and comments clean up
- Removed CMA support
2: CXL DOE for CDAT and Compliance Mode.
- Add default values for the absence of CDAT file
- Add cdatCDAT file example for use with cdat=<filename>
- Refactor DOE CXL compliance mode
- Naming and comments clean up
hchkuo (3):
PCIe Data Object Exchange implementation
CXL Data Object Exchange implementation
PCIe standard header for DOE
MAINTAINERS | 7 +
hw/cxl/cxl-cdat.c | 220 ++++++++++++++++++
hw/cxl/meson.build | 1 +
hw/mem/cxl_type3.c | 200 +++++++++++++++++
hw/pci/meson.build | 1 +
hw/pci/pcie_doe.c | 356 ++++++++++++++++++++++++++++++
include/hw/cxl/cxl_cdat.h | 149 +++++++++++++
include/hw/cxl/cxl_compliance.h | 297 +++++++++++++++++++++++++
include/hw/cxl/cxl_component.h | 7 +
include/hw/cxl/cxl_device.h | 4 +
include/hw/cxl/cxl_pci.h | 2 +
include/hw/pci/pci_ids.h | 2 +
include/hw/pci/pcie.h | 1 +
include/hw/pci/pcie_doe.h | 123 +++++++++++
include/hw/pci/pcie_regs.h | 3 +
include/standard-headers/linux/pci_regs.h | 3 +-
tests/data/cdat/cdat.dat | Bin 0 -> 148 bytes
17 files changed, 1375 insertions(+), 1 deletion(-)
create mode 100644 hw/cxl/cxl-cdat.c
create mode 100644 hw/pci/pcie_doe.c
create mode 100644 include/hw/cxl/cxl_cdat.h
create mode 100644 include/hw/cxl/cxl_compliance.h
create mode 100644 include/hw/pci/pcie_doe.h
create mode 100644 tests/data/cdat/cdat.dat
--
1.8.3.1
- [PATCH v4 cxl-2.0-doe 0/3] QEMU PCIe DOE for PCIe and CXL2.0,
Chris Browy <=