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[PATCH v3 20/30] target/ppc: Restrict has_work() handler to sysemu and T
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v3 20/30] target/ppc: Restrict has_work() handler to sysemu and TCG |
Date: |
Thu, 2 Sep 2021 18:15:33 +0200 |
Restrict has_work() to TCG sysemu.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/ppc/cpu_init.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 6aad01d1d3a..e2e721c2b81 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -8790,6 +8790,7 @@ static void ppc_cpu_set_pc(CPUState *cs, vaddr value)
cpu->env.nip = value;
}
+#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
static bool ppc_cpu_has_work(CPUState *cs)
{
PowerPCCPU *cpu = POWERPC_CPU(cs);
@@ -8797,6 +8798,7 @@ static bool ppc_cpu_has_work(CPUState *cs)
return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD);
}
+#endif /* CONFIG_TCG && !CONFIG_USER_ONLY */
static void ppc_cpu_reset(DeviceState *dev)
{
@@ -9017,6 +9019,7 @@ static const struct TCGCPUOps ppc_tcg_ops = {
.tlb_fill = ppc_cpu_tlb_fill,
#ifndef CONFIG_USER_ONLY
+ .has_work = ppc_cpu_has_work,
.cpu_exec_interrupt = ppc_cpu_exec_interrupt,
.do_interrupt = ppc_cpu_do_interrupt,
.cpu_exec_enter = ppc_cpu_exec_enter,
@@ -9042,7 +9045,6 @@ static void ppc_cpu_class_init(ObjectClass *oc, void
*data)
device_class_set_parent_reset(dc, ppc_cpu_reset, &pcc->parent_reset);
cc->class_by_name = ppc_cpu_class_by_name;
- cc->has_work = ppc_cpu_has_work;
cc->dump_state = ppc_cpu_dump_state;
cc->set_pc = ppc_cpu_set_pc;
cc->gdb_read_register = ppc_cpu_gdb_read_register;
--
2.31.1
- [PATCH v3 15/30] target/m68k: Restrict has_work() handler to sysemu and TCG, (continued)
- [PATCH v3 15/30] target/m68k: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/02
- [PATCH v3 16/30] target/microblaze: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/02
- [PATCH v3 18/30] target/nios2: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/02
- [PATCH v3 17/30] target/mips: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/02
- [PATCH v3 19/30] target/openrisc: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/02
- [PATCH v3 20/30] target/ppc: Restrict has_work() handler to sysemu and TCG,
Philippe Mathieu-Daudé <=
- [PATCH v3 21/30] target/ppc: Introduce PowerPCCPUClass::has_work(), Philippe Mathieu-Daudé, 2021/09/02
- Re: [PATCH v3 21/30] target/ppc: Introduce PowerPCCPUClass::has_work(), David Gibson, 2021/09/02
- Re: [PATCH v3 21/30] target/ppc: Introduce PowerPCCPUClass::has_work(), Philippe Mathieu-Daudé, 2021/09/03
- Re: [PATCH v3 21/30] target/ppc: Introduce PowerPCCPUClass::has_work(), Richard Henderson, 2021/09/03
- Re: [PATCH v3 21/30] target/ppc: Introduce PowerPCCPUClass::has_work(), Philippe Mathieu-Daudé, 2021/09/03
- Re: [PATCH v3 21/30] target/ppc: Introduce PowerPCCPUClass::has_work(), Philippe Mathieu-Daudé, 2021/09/11
- Re: [PATCH v3 21/30] target/ppc: Introduce PowerPCCPUClass::has_work(), Richard Henderson, 2021/09/12
[PATCH v3 22/30] target/ppc: Simplify has_work() handlers, Philippe Mathieu-Daudé, 2021/09/02