[PATCH] target/m68k: Optimize shift_mem() using extract() TCG opcode

[Philippe Mathieu-Daudé]

When running the scripts/coccinelle/tcg_gen_extract.cocci
Coccinelle semantic patch on target/m68k/, we get:

    [DBG] candidate at target/m68k/translate.c:3668

Manually inspect and replace combinations of (shri, andi)
and (movi, andi) opcodes by the extract opcode.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/m68k/translate.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 50a55f949cd..a38cf414077 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -3665,7 +3665,7 @@ DISAS_INSN(shift_mem)
     SRC_EA(env, src, OS_WORD, !logical, &addr);
     tcg_gen_movi_i32(QREG_CC_V, 0);
     if (left) {
-        tcg_gen_shri_i32(QREG_CC_C, src, 15);
+        tcg_gen_extract_i32(QREG_CC_C, src, 15, 1);
         tcg_gen_shli_i32(QREG_CC_N, src, 1);
 
         /*
@@ -3678,7 +3678,7 @@ DISAS_INSN(shift_mem)
             tcg_gen_xor_i32(QREG_CC_V, QREG_CC_N, src);
         }
     } else {
-        tcg_gen_mov_i32(QREG_CC_C, src);
+        tcg_gen_extract_i32(QREG_CC_C, src, 0, 1);
         if (logical) {
             tcg_gen_shri_i32(QREG_CC_N, src, 1);
         } else {
@@ -3687,7 +3687,6 @@ DISAS_INSN(shift_mem)
     }
 
     gen_ext(QREG_CC_N, QREG_CC_N, OS_WORD, 1);
-    tcg_gen_andi_i32(QREG_CC_C, QREG_CC_C, 1);
     tcg_gen_mov_i32(QREG_CC_Z, QREG_CC_N);
     tcg_gen_mov_i32(QREG_CC_X, QREG_CC_C);
 
-- 
2.31.1