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Re: [PATCH] target/riscv: csr: Implement mconfigptr CSR
From: |
Bin Meng |
Subject: |
Re: [PATCH] target/riscv: csr: Implement mconfigptr CSR |
Date: |
Thu, 7 Oct 2021 13:37:37 +0800 |
On Sun, Oct 3, 2021 at 7:29 PM Rahul Pathak <rpathak@ventanamicro.com> wrote:
>
> mconfigptr is an mandatory CSR as per the priv spec.
%s/an/a
as per the priv spec v1.12
> This csr holds the physical address of the configuration
> data structure if this data structure is implemented
> Its an readonly csr set to zero making configuration
> data structure not supported.
>
> Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
> ---
> target/riscv/cpu_bits.h | 1 +
> target/riscv/csr.c | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
> index 999187a9ee..5dc4729ed5 100644
> --- a/target/riscv/cpu_bits.h
> +++ b/target/riscv/cpu_bits.h
> @@ -140,6 +140,7 @@
> #define CSR_MARCHID 0xf12
> #define CSR_MIMPID 0xf13
> #define CSR_MHARTID 0xf14
> +#define CSR_MCONFIGPTR 0xf15
>
> /* Machine Trap Setup */
> #define CSR_MSTATUS 0x300
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index 23fbbd3216..2182943f54 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -1549,6 +1549,7 @@ riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = {
> [CSR_MARCHID] = { "marchid", any, read_zero },
> [CSR_MIMPID] = { "mimpid", any, read_zero },
> [CSR_MHARTID] = { "mhartid", any, read_mhartid },
> + [CSR_MCONFIGPTR] = {"mconfigptr", any, read_zero },
Not any, as we need to check the priv version >= 1.12
>
> /* Machine Trap Setup */
> [CSR_MSTATUS] = { "mstatus", any, read_mstatus,
> write_mstatus },
> --
Regards,
Bin