Re: [PATCH 03/31] target/loongarch: Set default csr values.

[Richard Henderson]

On 10/19/21 12:34 AM, Xiaojuan Yang wrote:
> +#ifndef CONFIG_USER_ONLY
> +static void set_loongarch_csr(CPULoongArchState *env)
> +{
> +    uint64_t t;
> +
> +    t = FIELD_DP64(0, CSR_PRCFG1, SAVE_NUM, 8);
> +    t = FIELD_DP64(t, CSR_PRCFG1, TIMER_BITS, 0x2f);
> +    t = FIELD_DP64(t, CSR_PRCFG1, VSMAX, 0x7);
> +    env->CSR_PRCFG1 = t;
> +
> +    env->CSR_PRCFG2 = 0x3ffff000;
> +
> +    t = FIELD_DP64(0, CSR_PRCFG3, TLB_TYPE, 2);
> +    t = FIELD_DP64(t, CSR_PRCFG3, MTLB_ENTRY, 0x3f);
> +    t = FIELD_DP64(t, CSR_PRCFG3, STLB_WAYS, 0x7);
> +    t = FIELD_DP64(t, CSR_PRCFG3, STLB_SETS, 0x8);
> +    env->CSR_PRCFG3 = t;
> +
> +    t = FIELD_DP64(0, CSR_CRMD, PLV, 0);
> +    t = FIELD_DP64(t, CSR_CRMD, IE, 0);
> +    t = FIELD_DP64(t, CSR_CRMD, DA, 1);
> +    t = FIELD_DP64(t, CSR_CRMD, PG, 0);
> +    t = FIELD_DP64(t, CSR_CRMD, DATF, 1);
> +    t = FIELD_DP64(t, CSR_CRMD, DATM, 1);
> +    env->CSR_CRMD = t;
> +
> +    env->CSR_ECFG = FIELD_DP64(0, CSR_ECFG, VS, 7);
> +    env->CSR_STLBPS  = 0xe;
> +    env->CSR_RVACFG = 0x0;
> +    env->CSR_ASID = 0xa0000;
> +    env->CSR_ERA = env->pc;
> +}
> +#endif
> +
>   /* LoongArch CPU definitions */
>   static void loongarch_3a5000_initfn(Object *obj)
>   {
> @@ -113,6 +147,9 @@ static void loongarch_3a5000_initfn(Object *obj)
>       CPULoongArchState *env = &cpu->env;
>   
>       set_loongarch_cpucfg(env);
> +#ifndef CONFIG_USER_ONLY
> +    set_loongarch_csr(env);
> +#endif
>   }
>   
>   static void loongarch_cpu_list_entry(gpointer data, gpointer user_data)
> @@ -140,6 +177,9 @@ static void loongarch_cpu_reset(DeviceState *dev)
>       lacc->parent_reset(dev);
>   
>       set_loongarch_cpucfg(env);
> +#ifndef CONFIG_USER_ONLY
> +    set_loongarch_csr(env);
> +#endif

As I said vs patch 2, I think you'll want to set all of these unconditionally.


r~