Re: [PATCH 2/3] target/mips: Fix MSA MSUBV.B opcode

[Richard Henderson]

On 10/22/21 10:45 AM, Philippe Mathieu-Daudé wrote:
> The result of the 'Vector Multiply and Subtract' opcode is
> incorrect with Byte vectors. Probably due to a copy/paste error,
> commit 5f148a02327 mistakenly used the $wt (target register)
> instead  of $wd (destination register) as first operand. Fix that.
>
> Cc: Aleksandar Rikalo<aleksandar.rikalo@syrmia.com>
> Fixes: 5f148a02327 ("target/mips: msa: Split helpers for MSUBV.<B|H|W|D>")
> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
> ---
>   target/mips/tcg/msa_helper.c | 32 ++++++++++++++++----------------
>   1 file changed, 16 insertions(+), 16 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~