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[PATCH v4 00/19] target/ppc: DFP instructions using decodetree
From: |
Luis Pires |
Subject: |
[PATCH v4 00/19] target/ppc: DFP instructions using decodetree |
Date: |
Mon, 25 Oct 2021 16:11:35 -0300 |
This series moves all existing DFP instructions to decodetree and
implements the 2 new instructions (dcffixqq and dctfixqq) from
Power ISA 3.1.
In order to implement dcffixqq, divu128/divs128 were modified to
support 128-bit quotients (previously, they were limited to 64-bit
quotients), along with adjustments being made to their existing callers.
libdecnumber was also expanded to allow creating decimal numbers from
128-bit integers.
Similarly, for dctfixqq, mulu128 (host-utils) and decNumberIntegralToInt128
(libdecnumber) were introduced to support 128-bit integers.
The remaining patches of this series move all of the already existing
DFP instructions to decodetree, and end up removing dfp-ops.c.inc, which
is no longer needed.
NOTE 1: The previous, non-decodetree code, was updating ctx->nip for all the
DFP instructions. I've removed that, but it would be great if someone could
confirm that updating nip really wasn't necessary.
NOTE 2: Some arithmetic function support for 128-bit integers was added,
for now, still using 64-bit pairs. In the near future, I think we should
modify all of them to use Int128 (and introduce UInt128). But I'll send
out an RFC to discuss how to do that in another patch series.
NOTE 3: The helper names are in uppercase, to match the instruction
names and to simplify the macros that define trans* functions.
Previously, this wasn't the case, as we were using lowercase instruction
names in the pre-decodetree code. Another standalone patch will be sent
later on, changing to uppercase the other new (decodetree) helpers whose
names are directly related to instruction names, eventually making PPC
helper names consistent.
The only patch still needing review is:
[PATCH v4 12/19] target/ppc: Do not update nip on DFP instructions
Changes in v4:
- Rebased against dgibson/ppc-for-6.2
- Skipped patches that were already applied (v3 1-4)
- Changed divu128/divs128 to return the remainder (rth)
- Moved changes that drop nip updates to a separate patch (rth)
Changes in v3:
- Split the uabs64 patch in 2
- Included patch to fix missing zero-extension in divs128
- Folded divisor == 0 into the dhi == 0 case in divu128
- Moved udiv_qrnnd from softfloat-macros.h to host-utils.h
- Used udiv_qrnnd in divu128
- Replaced int with bool in divs128
- Added unit test to check the divisor normalization in divu128
- Removed 'inline' from times_* functions in ppc/translate.c
- Used uadd64_overflow in mulu128
- Removed unnecessary 'else' from decNumberIntegralToInt128
Changes in v2:
- Renamed abs64() to uabs64()
Bruno Larsen (1):
target/ppc: Move REQUIRE_ALTIVEC/VECTOR to translate.c
Fernando Valle (1):
target/ppc: Introduce REQUIRE_FPU
Luis Pires (17):
host-utils: move checks out of divu128/divs128
host-utils: move udiv_qrnnd() to host-utils
host-utils: add 128-bit quotient support to divu128/divs128
host-utils: add unit tests for divu128/divs128
libdecnumber: introduce decNumberFrom[U]Int128
target/ppc: Implement DCFFIXQQ
host-utils: Introduce mulu128
libdecnumber: Introduce decNumberIntegralToInt128
target/ppc: Implement DCTFIXQQ
target/ppc: Do not update nip on DFP instructions
target/ppc: Move dtstdc[q]/dtstdg[q] to decodetree
target/ppc: Move d{add,sub,mul,div,iex}[q] to decodetree
target/ppc: Move dcmp{u,o}[q],dts{tex,tsf,tsfi}[q] to decodetree
target/ppc: Move dquai[q], drint{x,n}[q] to decodetree
target/ppc: Move dqua[q], drrnd[q] to decodetree
target/ppc: Move dct{dp,qpq},dr{sp,dpq},dc{f,t}fix[q],dxex[q] to
decodetree
target/ppc: Move ddedpd[q],denbcd[q],dscli[q],dscri[q] to decodetree
include/fpu/softfloat-macros.h | 82 -----
include/hw/clock.h | 5 +-
include/libdecnumber/decNumber.h | 4 +
include/libdecnumber/decNumberLocal.h | 2 +-
include/qemu/host-utils.h | 157 +++++++--
libdecnumber/decContext.c | 7 +-
libdecnumber/decNumber.c | 131 ++++++++
target/ppc/dfp_helper.c | 168 +++++++---
target/ppc/helper.h | 106 ++++---
target/ppc/insn32.decode | 171 ++++++++++
target/ppc/int_helper.c | 23 +-
target/ppc/translate.c | 23 +-
target/ppc/translate/dfp-impl.c.inc | 419 ++++++++++++-------------
target/ppc/translate/dfp-ops.c.inc | 165 ----------
target/ppc/translate/vector-impl.c.inc | 10 +-
tests/unit/meson.build | 1 +
tests/unit/test-div128.c | 197 ++++++++++++
util/host-utils.c | 137 +++++---
18 files changed, 1148 insertions(+), 660 deletions(-)
delete mode 100644 target/ppc/translate/dfp-ops.c.inc
create mode 100644 tests/unit/test-div128.c
--
2.25.1
- [PATCH v4 00/19] target/ppc: DFP instructions using decodetree,
Luis Pires <=
- [PATCH v4 01/19] host-utils: move checks out of divu128/divs128, Luis Pires, 2021/10/25
- [PATCH v4 02/19] host-utils: move udiv_qrnnd() to host-utils, Luis Pires, 2021/10/25
- [PATCH v4 03/19] host-utils: add 128-bit quotient support to divu128/divs128, Luis Pires, 2021/10/25
- [PATCH v4 04/19] host-utils: add unit tests for divu128/divs128, Luis Pires, 2021/10/25
- [PATCH v4 05/19] libdecnumber: introduce decNumberFrom[U]Int128, Luis Pires, 2021/10/25
- [PATCH v4 06/19] target/ppc: Move REQUIRE_ALTIVEC/VECTOR to translate.c, Luis Pires, 2021/10/25
- [PATCH v4 07/19] target/ppc: Introduce REQUIRE_FPU, Luis Pires, 2021/10/25
- [PATCH v4 08/19] target/ppc: Implement DCFFIXQQ, Luis Pires, 2021/10/25
- [PATCH v4 09/19] host-utils: Introduce mulu128, Luis Pires, 2021/10/25