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Re: [PATCH v2] hvf: arm: Ignore cache operations on MMIO


From: Alexander Graf
Subject: Re: [PATCH v2] hvf: arm: Ignore cache operations on MMIO
Date: Tue, 26 Oct 2021 18:38:51 +0200


> Am 26.10.2021 um 18:10 schrieb Richard Henderson 
> <richard.henderson@linaro.org>:
> 
> On 10/26/21 12:12 AM, Alexander Graf wrote:
>> +        if (cm) {
>> +            /* We don't cache MMIO regions */
>> +            advance_pc = true;
>> +            break;
>> +        }
>> +
>>          assert(isv);
> 
> The assert should come first.  If the "iss valid" bit is not set, then 
> nothing else in the word is defined.
> 
> Otherwise,
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Yes, but isv=0 for cm=1. And even in other isv=0 situations most other fields 
are valid (post-idx provides the correct va/pa too for example).

Does cm=1 really give you isv=1 on other hardware?

Alex




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