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[PATCH v3 32/32] target/mips: Adjust style in msa_translate_init()
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v3 32/32] target/mips: Adjust style in msa_translate_init() |
Date: |
Thu, 28 Oct 2021 23:08:43 +0200 |
While the first 'off' variable assignment is unused, it helps
to better understand the code logic. Move the assignation where
it would have been used so it is easier to compare the MSA
registers based on FPU ones versus the MSA specific registers.
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/tcg/msa_translate.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c
index a1455ca6fa7..7576b3ed86b 100644
--- a/target/mips/tcg/msa_translate.c
+++ b/target/mips/tcg/msa_translate.c
@@ -132,13 +132,15 @@ void msa_translate_init(void)
int i;
for (i = 0; i < 32; i++) {
- int off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]);
+ int off;
/*
* The MSA vector registers are mapped on the
* scalar floating-point unit (FPU) registers.
*/
+ off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]);
msa_wr_d[i * 2] = fpu_f64[i];
+
off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]);
msa_wr_d[i * 2 + 1] =
tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2 + 1]);
--
2.31.1
- [PATCH v3 22/32] target/mips: Convert MSA 3R instruction format to decodetree (part 3/4), (continued)
- [PATCH v3 22/32] target/mips: Convert MSA 3R instruction format to decodetree (part 3/4), Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 24/32] target/mips: Convert MSA ELM instruction format to decodetree, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 23/32] target/mips: Convert MSA 3R instruction format to decodetree (part 4/4), Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 25/32] target/mips: Convert MSA COPY_U opcode to decodetree, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 26/32] target/mips: Convert MSA COPY_S and INSERT opcodes to decodetree, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 27/32] target/mips: Convert MSA MOVE.V opcode to decodetree, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 28/32] target/mips: Convert CFCMSA opcode to decodetree, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 29/32] target/mips: Convert CTCMSA opcode to decodetree, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 30/32] target/mips: Remove generic MSA opcode, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 31/32] target/mips: Remove one MSA unnecessary decodetree overlap group, Philippe Mathieu-Daudé, 2021/10/28
- [PATCH v3 32/32] target/mips: Adjust style in msa_translate_init(),
Philippe Mathieu-Daudé <=