Re: [PATCH 07/31] target/loongarch: Add loongarch csr/iocsr instruction support

[Richard Henderson]

On 10/28/21 11:26 PM, yangxiaojuan wrote:
> (1) For the iocsr registers, most of them act on the interrupt controller, the 
> read and write will go to interrupt's mmio read/write.
> So I modified the addr to their mmio range. The ext interrupt controller use 
> the sysbus's function to handle the interrupt cascade and
> sysbus_mmio_map to map the address which use the system memory region. So if I 
> use a different address space, I realize a different
> sysbus_mmio_map function use a different address space, is it feasible ?

You shouldn't need a different function at all.  All of the difference will be in how you 
construct the mmio region: create a new address space, and add the mmio region to that 
address space at the correct base address.

> (2)Can you help me review the remaining patches? Thanks.

The remaining patches are harder for me to review, because I'm not as familiar with the 
fine details in hw/, but I'll try.


r~