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Re: [PATCH v6 38/66] target/sh4: Make sh4_cpu_tlb_fill sysemu only
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [PATCH v6 38/66] target/sh4: Make sh4_cpu_tlb_fill sysemu only |
Date: |
Sun, 31 Oct 2021 11:21:18 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.2.0 |
On 10/30/21 19:16, Richard Henderson wrote:
> The fallback code in cpu_loop_exit_sigsegv is sufficient
> for sh4 linux-user.
>
> Remove the code from cpu_loop that raised SIGSEGV.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/sh4/cpu.h | 6 +++---
> linux-user/sh4/cpu_loop.c | 8 --------
> target/sh4/cpu.c | 2 +-
> target/sh4/helper.c | 9 +--------
> 4 files changed, 5 insertions(+), 20 deletions(-)
>
> diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
> index dc81406646..4cfb109f56 100644
> --- a/target/sh4/cpu.h
> +++ b/target/sh4/cpu.h
> @@ -213,12 +213,12 @@ void superh_cpu_do_unaligned_access(CPUState *cpu,
> vaddr addr,
> uintptr_t retaddr) QEMU_NORETURN;
>
> void sh4_translate_init(void);
> +void sh4_cpu_list(void);
> +
> +#if !defined(CONFIG_USER_ONLY)
> bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> MMUAccessType access_type, int mmu_idx,
> bool probe, uintptr_t retaddr);
> -
> -void sh4_cpu_list(void);
> -#if !defined(CONFIG_USER_ONLY)
> void superh_cpu_do_interrupt(CPUState *cpu);
> bool superh_cpu_exec_interrupt(CPUState *cpu, int int_req);
> void cpu_sh4_invalidate_tlb(CPUSH4State *s);
> diff --git a/linux-user/sh4/cpu_loop.c b/linux-user/sh4/cpu_loop.c
> index 65b8972e3c..ac9b01840c 100644
> --- a/linux-user/sh4/cpu_loop.c
> +++ b/linux-user/sh4/cpu_loop.c
> @@ -65,14 +65,6 @@ void cpu_loop(CPUSH4State *env)
> info.si_code = TARGET_TRAP_BRKPT;
> queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
> break;
> - case 0xa0:
> - case 0xc0:
> - info.si_signo = TARGET_SIGSEGV;
> - info.si_errno = 0;
> - info.si_code = TARGET_SEGV_MAPERR;
> - info._sifields._sigfault._addr = env->tea;
> - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
> - break;
> case EXCP_ATOMIC:
> cpu_exec_step_atomic(cs);
> arch_interrupt = false;
> diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
> index 2047742d03..06b2691dc4 100644
> --- a/target/sh4/cpu.c
> +++ b/target/sh4/cpu.c
> @@ -236,9 +236,9 @@ static const struct SysemuCPUOps sh4_sysemu_ops = {
> static const struct TCGCPUOps superh_tcg_ops = {
> .initialize = sh4_translate_init,
> .synchronize_from_tb = superh_cpu_synchronize_from_tb,
> - .tlb_fill = superh_cpu_tlb_fill,
>
> #ifndef CONFIG_USER_ONLY
> + .tlb_fill = superh_cpu_tlb_fill,
> .cpu_exec_interrupt = superh_cpu_exec_interrupt,
> .do_interrupt = superh_cpu_do_interrupt,
> .do_unaligned_access = superh_cpu_do_unaligned_access,
> diff --git a/target/sh4/helper.c b/target/sh4/helper.c
> index 53cb9c3b63..6a620e36fc 100644
> --- a/target/sh4/helper.c
> +++ b/target/sh4/helper.c
> @@ -796,8 +796,6 @@ bool superh_cpu_exec_interrupt(CPUState *cs, int
> interrupt_request)
> return false;
> }
>
> -#endif /* !CONFIG_USER_ONLY */
> -
> bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> MMUAccessType access_type, int mmu_idx,
> bool probe, uintptr_t retaddr)
> @@ -806,11 +804,6 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address,
> int size,
> CPUSH4State *env = &cpu->env;
> int ret;
>
> -#ifdef CONFIG_USER_ONLY
> - ret = (access_type == MMU_DATA_STORE ? MMU_DTLB_VIOLATION_WRITE :
> - access_type == MMU_INST_FETCH ? MMU_ITLB_VIOLATION :
> - MMU_DTLB_VIOLATION_READ);
> -#else
> target_ulong physical;
> int prot;
>
> @@ -829,7 +822,6 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int
> size,
> if (ret != MMU_DTLB_MULTIPLE && ret != MMU_ITLB_MULTIPLE) {
> env->pteh = (env->pteh & PTEH_ASID_MASK) | (address & PTEH_VPN_MASK);
> }
> -#endif
>
> env->tea = address;
> switch (ret) {
> @@ -868,3 +860,4 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int
> size,
> }
> cpu_loop_exit_restore(cs, retaddr);
> }
> +#endif /* !CONFIG_USER_ONLY */
>
To the best of my knowledge:
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
- [PATCH v6 24/66] target/cris: Make cris_cpu_tlb_fill sysemu only, (continued)
- [PATCH v6 24/66] target/cris: Make cris_cpu_tlb_fill sysemu only, Richard Henderson, 2021/10/30
- [PATCH v6 29/66] target/microblaze: Make mb_cpu_tlb_fill sysemu only, Richard Henderson, 2021/10/30
- [PATCH v6 21/66] target/alpha: Implement alpha_cpu_record_sigsegv, Richard Henderson, 2021/10/30
- [PATCH v6 28/66] target/m68k: Make m68k_cpu_tlb_fill sysemu only, Richard Henderson, 2021/10/30
- [PATCH v6 34/66] target/ppc: Implement ppc_cpu_record_sigsegv, Richard Henderson, 2021/10/30
- [PATCH v6 27/66] target/i386: Implement x86_cpu_record_sigsegv, Richard Henderson, 2021/10/30
- [PATCH v6 35/66] target/riscv: Make riscv_cpu_tlb_fill sysemu only, Richard Henderson, 2021/10/30
- [PATCH v6 38/66] target/sh4: Make sh4_cpu_tlb_fill sysemu only, Richard Henderson, 2021/10/30
- Re: [PATCH v6 38/66] target/sh4: Make sh4_cpu_tlb_fill sysemu only,
Philippe Mathieu-Daudé <=
- [PATCH v6 39/66] target/sparc: Make sparc_cpu_tlb_fill sysemu only, Richard Henderson, 2021/10/30
- [PATCH v6 26/66] target/hppa: Make hppa_cpu_tlb_fill sysemu only, Richard Henderson, 2021/10/30
- [PATCH v6 31/66] target/nios2: Implement nios2_cpu_record_sigsegv, Richard Henderson, 2021/10/30
- [PATCH v6 37/66] target/s390x: Implement s390_cpu_record_sigsegv, Richard Henderson, 2021/10/30
- [PATCH v6 15/66] linux-user/host/riscv: Populate host_signal.h, Richard Henderson, 2021/10/30
- [PATCH v6 17/66] linux-user/host/riscv: Improve host_signal_write, Richard Henderson, 2021/10/30
- [PATCH v6 18/66] linux-user/signal: Drop HOST_SIGNAL_PLACEHOLDER, Richard Henderson, 2021/10/30
- [PATCH v6 19/66] hw/core: Add TCGCPUOps.record_sigsegv, Richard Henderson, 2021/10/30
- [PATCH v6 22/66] target/arm: Use cpu_loop_exit_sigsegv for mte tag lookup, Richard Henderson, 2021/10/30