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[PULL 05/38] hw/arm/virt: Support CPU cluster on ARM virt machine
From: |
Peter Maydell |
Subject: |
[PULL 05/38] hw/arm/virt: Support CPU cluster on ARM virt machine |
Date: |
Thu, 20 Jan 2022 12:35:57 +0000 |
From: Yanan Wang <wangyanan55@huawei.com>
ARM64 machines like Kunpeng Family Server Chips have a level
of hardware topology in which a group of CPU cores share L3
cache tag or L2 cache. For example, Kunpeng 920 typically
has 6 or 8 clusters in each NUMA node (also represent range
of CPU die), and each cluster has 4 CPU cores. All clusters
share L3 cache data, but CPU cores in each cluster share a
local L3 tag.
Running a guest kernel with Cluster-Aware Scheduling on the
Hosts which have physical clusters, if we can design a vCPU
topology with cluster level for guest kernel and then have
a dedicated vCPU pinning, the guest will gain scheduling
performance improvement from cache affinity of CPU cluster.
So let's enable the support for this new parameter on ARM
virt machines. After this patch, we can define a 4-level
CPU hierarchy like: cpus=*,maxcpus=*,sockets=*,clusters=*,
cores=*,threads=*.
Signed-off-by: Yanan Wang <wangyanan55@huawei.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Message-id: 20220107083232.16256-2-wangyanan55@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/virt.c | 1 +
qemu-options.hx | 10 ++++++++++
2 files changed, 11 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 84c2444fff6..688d8736909 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -2718,6 +2718,7 @@ static void virt_machine_class_init(ObjectClass *oc, void
*data)
hc->unplug_request = virt_machine_device_unplug_request_cb;
hc->unplug = virt_machine_device_unplug_cb;
mc->nvdimm_supported = true;
+ mc->smp_props.clusters_supported = true;
mc->auto_enable_numa_with_memhp = true;
mc->auto_enable_numa_with_memdev = true;
mc->default_ram_id = "mach-virt.ram";
diff --git a/qemu-options.hx b/qemu-options.hx
index ec90505d84e..ba3ae6a42aa 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -277,6 +277,16 @@ SRST
-smp 16,sockets=2,dies=2,cores=2,threads=2,maxcpus=16
+ The following sub-option defines a CPU topology hierarchy (2 sockets
+ totally on the machine, 2 clusters per socket, 2 cores per cluster,
+ 2 threads per core) for ARM virt machines which support sockets/clusters
+ /cores/threads. Some members of the option can be omitted but their values
+ will be automatically computed:
+
+ ::
+
+ -smp 16,sockets=2,clusters=2,cores=2,threads=2,maxcpus=16
+
Historically preference was given to the coarsest topology parameters
when computing missing values (ie sockets preferred over cores, which
were preferred over threads), however, this behaviour is considered
--
2.25.1
- [PULL 00/38] target-arm queue, Peter Maydell, 2022/01/20
- [PULL 05/38] hw/arm/virt: Support CPU cluster on ARM virt machine,
Peter Maydell <=
- [PULL 01/38] hw/arm/virt: KVM: Enable PAuth when supported by the host, Peter Maydell, 2022/01/20
- [PULL 09/38] hw/acpi/aml-build: Support cluster level in PPTT generation, Peter Maydell, 2022/01/20
- [PULL 17/38] hw/arm/virt: Add a control for the the highmem redistributors, Peter Maydell, 2022/01/20
- [PULL 08/38] tests/acpi/bios-tables-test: Allow changes to virt/PPTT file, Peter Maydell, 2022/01/20
- [PULL 02/38] hw: Move MARVELL_88W8618 Kconfig from audio/ to arm/, Peter Maydell, 2022/01/20
- [PULL 12/38] virtio-mem: Correct default THP size for ARM64, Peter Maydell, 2022/01/20
- [PULL 14/38] hw/intc/arm_gic: Implement read of GICC_IIDR, Peter Maydell, 2022/01/20
- [PULL 23/38] hw/misc/aspeed_i3c.c: Introduce a dummy AST2600 I3C model., Peter Maydell, 2022/01/20
- [PULL 35/38] hw/intc/arm_gicv3_its: Factor out "find address of table entry" code, Peter Maydell, 2022/01/20
- [PULL 18/38] hw/arm/virt: Honor highmem setting when computing the memory map, Peter Maydell, 2022/01/20