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[PATCH v2 17/38] target/ppc: implement vcntmb[bhwd]
From: |
matheus . ferst |
Subject: |
[PATCH v2 17/38] target/ppc: implement vcntmb[bhwd] |
Date: |
Tue, 25 Jan 2022 09:19:22 -0300 |
From: Matheus Ferst <matheus.ferst@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
target/ppc/insn32.decode | 8 ++++++++
target/ppc/translate/vmx-impl.c.inc | 32 +++++++++++++++++++++++++++++
2 files changed, 40 insertions(+)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index bf2f3b1e0b..0a3e39f3e9 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -63,6 +63,9 @@
&VX_bf bf vra vrb
@VX_bf ...... bf:3 .. vra:5 vrb:5 ........... &VX_bf
+&VX_mp rt mp:bool vrb
+@VX_mp ...... rt:5 .... mp:1 vrb:5 ........... &VX_mp
+
&VX_tb_rc vrt vrb rc:bool
@VX_tb_rc ...... vrt:5 ..... vrb:5 rc:1 .......... &VX_tb_rc
@@ -489,6 +492,11 @@ VEXTRACTWM 000100 ..... 01010 ..... 11001000010
@VX_tb
VEXTRACTDM 000100 ..... 01011 ..... 11001000010 @VX_tb
VEXTRACTQM 000100 ..... 01100 ..... 11001000010 @VX_tb
+VCNTMBB 000100 ..... 1100 . ..... 11001000010 @VX_mp
+VCNTMBH 000100 ..... 1101 . ..... 11001000010 @VX_mp
+VCNTMBW 000100 ..... 1110 . ..... 11001000010 @VX_mp
+VCNTMBD 000100 ..... 1111 . ..... 11001000010 @VX_mp
+
## Vector Multiply-Sum Instructions
VMSUMCUD 000100 ..... ..... ..... ..... 010111 @VA
diff --git a/target/ppc/translate/vmx-impl.c.inc
b/target/ppc/translate/vmx-impl.c.inc
index 9ae0ab94ac..78b277466a 100644
--- a/target/ppc/translate/vmx-impl.c.inc
+++ b/target/ppc/translate/vmx-impl.c.inc
@@ -1932,6 +1932,38 @@ static bool trans_MTVSRBMI(DisasContext *ctx, arg_DX_b
*a)
return true;
}
+static bool do_vcntmb(DisasContext *ctx, arg_VX_mp *a, int vece)
+{
+ TCGv_i64 rt, vrb, mask;
+ rt = tcg_const_i64(0);
+ vrb = tcg_temp_new_i64();
+ mask = tcg_constant_i64(dup_const(vece, 1ULL << ((8 << vece) - 1)));
+
+ for (int i = 0; i < 2; i++) {
+ get_avr64(vrb, a->vrb, i);
+ if (a->mp) {
+ tcg_gen_and_i64(vrb, mask, vrb);
+ } else {
+ tcg_gen_andc_i64(vrb, mask, vrb);
+ }
+ tcg_gen_ctpop_i64(vrb, vrb);
+ tcg_gen_add_i64(rt, rt, vrb);
+ }
+
+ tcg_gen_shli_i64(rt, rt, TARGET_LONG_BITS - 8 + vece);
+ tcg_gen_trunc_i64_tl(cpu_gpr[a->rt], rt);
+
+ tcg_temp_free_i64(vrb);
+ tcg_temp_free_i64(rt);
+
+ return true;
+}
+
+TRANS(VCNTMBB, do_vcntmb, MO_8)
+TRANS(VCNTMBH, do_vcntmb, MO_16)
+TRANS(VCNTMBW, do_vcntmb, MO_32)
+TRANS(VCNTMBD, do_vcntmb, MO_64)
+
static bool do_vstri(DisasContext *ctx, arg_VX_tb_rc *a,
void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv))
{
--
2.25.1
- [PATCH v2 07/38] target/ppc: Move vexts[bhw]2[wd] to decodetree, (continued)
- [PATCH v2 07/38] target/ppc: Move vexts[bhw]2[wd] to decodetree, matheus . ferst, 2022/01/25
- [PATCH v2 09/38] target/ppc: Move Vector Compare Equal/Not Equal/Greater Than to decodetree, matheus . ferst, 2022/01/25
- [PATCH v2 11/38] target/ppc: Implement Vector Compare Equal Quadword, matheus . ferst, 2022/01/25
- [PATCH v2 12/38] target/ppc: Implement Vector Compare Greater Than Quadword, matheus . ferst, 2022/01/25
- [PATCH v2 13/38] target/ppc: Implement Vector Compare Quadword, matheus . ferst, 2022/01/25
- [PATCH v2 14/38] target/ppc: implement vstri[bh][lr], matheus . ferst, 2022/01/25
- [PATCH v2 15/38] target/ppc: implement vclrlb, matheus . ferst, 2022/01/25
- [PATCH v2 18/38] target/ppc: implement vgnb, matheus . ferst, 2022/01/25
- [PATCH v2 19/38] target/ppc: Move vsel and vperm/vpermr to decodetree, matheus . ferst, 2022/01/25
- [PATCH v2 20/38] target/ppc: Move xxsel to decodetree, matheus . ferst, 2022/01/25
- [PATCH v2 17/38] target/ppc: implement vcntmb[bhwd],
matheus . ferst <=
- [PATCH v2 16/38] target/ppc: implement vclrrb, matheus . ferst, 2022/01/25
- [PATCH v2 21/38] target/ppc: move xxperm/xxpermr to decodetree, matheus . ferst, 2022/01/25
- [PATCH v2 23/38] target/ppc: Implement xxpermx instruction, matheus . ferst, 2022/01/25
- [PATCH v2 22/38] target/ppc: Move xxpermdi to decodetree, matheus . ferst, 2022/01/25
- [PATCH v2 25/38] target/ppc: Implement xxeval, matheus . ferst, 2022/01/25
- [PATCH v2 24/38] tcg/tcg-op-gvec.c: Introduce tcg_gen_gvec_4i, matheus . ferst, 2022/01/25
- [PATCH v2 26/38] target/ppc: Implement xxgenpcv[bhwd]m instruction, matheus . ferst, 2022/01/25
- [PATCH v2 27/38] target/ppc: move xs[n]madd[am][ds]p/xs[n]msub[am][ds]p to decodetree, matheus . ferst, 2022/01/25
- [PATCH v2 28/38] target/ppc: implement xs[n]maddqp[o]/xs[n]msubqp[o], matheus . ferst, 2022/01/25
- [PATCH v2 29/38] target/ppc: Implement xvtlsbb instruction, matheus . ferst, 2022/01/25