[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 08/11] target/loongarch: Fix the meaning of ECFG reg's VS field
From: |
Xiaojuan Yang |
Subject: |
[PATCH 08/11] target/loongarch: Fix the meaning of ECFG reg's VS field |
Date: |
Fri, 1 Jul 2022 17:34:04 +0800 |
By the manual of LoongArch CSR, the VS field(18:16 bits) of
ECFG reg means that the number of instructions between each
exception entry is 2^VS.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
---
target/loongarch/cpu.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 4c8f96bc3a..04e5e47da4 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -219,6 +219,10 @@ static void loongarch_cpu_do_interrupt(CPUState *cs)
env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, PLV, 0);
env->CSR_CRMD = FIELD_DP64(env->CSR_CRMD, CSR_CRMD, IE, 0);
+ if (vec_size) {
+ vec_size = (1 << vec_size) * 4;
+ }
+
if (cs->exception_index == EXCCODE_INT) {
/* Interrupt */
uint32_t vector = 0;
--
2.31.1
- Re: [PATCH 03/11] hw/rtc/ls7a_rtc: Remove unimplemented device in realized function, (continued)
- [PATCH 07/11] hw/rtc/ls7a_rtc: Fix 'calculate' spelling errors, Xiaojuan Yang, 2022/07/01
- [PATCH 10/11] hw/intc/loongarch_ipi: Fix ipi device access of 64bits, Xiaojuan Yang, 2022/07/01
- [PATCH 08/11] target/loongarch: Fix the meaning of ECFG reg's VS field,
Xiaojuan Yang <=
- [PATCH 02/11] hw/rtc/ls7a_rtc: Fix timer call back function, Xiaojuan Yang, 2022/07/01
- [PATCH 01/11] hw/rtc/ls7a_rtc: Fix uninitialied bugs and toymatch writing function, Xiaojuan Yang, 2022/07/01
- [PATCH 09/11] target/loongarch: Add lock when writing timer clear reg, Xiaojuan Yang, 2022/07/01
- Re: [PATCH v2 00/11] Fix bugs for LoongArch virt machine, Richard Henderson, 2022/07/04