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Re: updates for designware pci-host


From: Ben Dooks
Subject: Re: updates for designware pci-host
Date: Wed, 27 Jul 2022 14:20:35 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0

On 27/07/2022 13:56, Peter Maydell wrote:
On Wed, 27 Jul 2022 at 12:15, Ben Dooks <qemu@ben.fluff.org> wrote:

On Wed, Jul 13, 2022 at 05:54:42PM +0100, Ben Dooks wrote:
As part of a project we have been looking at using the DesignWare
PCIe host. We found a few issues of missing features or small bugs
when using this with a recent Linux kernel (v5.17.x)

Whilst doing this we also made a start on some tracing events.

Hi, has anyone had a chance to review these. If so can this series
get applied? If not should anyone else be added to the review list?

If it would be easier I can try and find a git tree to publish this
branch on if a pull request would be easier.

Is there a public spec for the hardware? There isn't anything
listed in the source file in the tree. Without the h/w specs
it's pretty difficult to review changes.

Some of this I did against the Linux driver from the v5.17 kernel
which didn't work until these fixes were added (not sure when the
Linux kernel got the ATU size autodetection in, etc).

I think everything described in this set was from Linux, but I
do have access to the Synopsys v5 PCIe core documentation so have
not gone to see if there is anything publicly available.

--
Ben




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