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[PULL 04/44] target/riscv: move zmmul out of the experimental properties
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From: |
Alistair Francis |
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Subject: |
[PULL 04/44] target/riscv: move zmmul out of the experimental properties |
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Date: |
Wed, 7 Sep 2022 10:03:13 +0200 |
From: Weiwei Li <liweiwei@iscas.ac.cn>
- Zmmul is ratified and is now version 1.0
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220710101546.3907-1-liweiwei@iscas.ac.cn>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index cab74faaca..a3e4e2477f 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1009,12 +1009,13 @@ static Property riscv_cpu_extensions[] = {
DEFINE_PROP_BOOL("zhinx", RISCVCPU, cfg.ext_zhinx, false),
DEFINE_PROP_BOOL("zhinxmin", RISCVCPU, cfg.ext_zhinxmin, false),
+ DEFINE_PROP_BOOL("zmmul", RISCVCPU, cfg.ext_zmmul, false),
+
/* Vendor-specific custom extensions */
DEFINE_PROP_BOOL("xventanacondops", RISCVCPU, cfg.ext_XVentanaCondOps,
false),
/* These are experimental so mark with 'x-' */
DEFINE_PROP_BOOL("x-j", RISCVCPU, cfg.ext_j, false),
- DEFINE_PROP_BOOL("x-zmmul", RISCVCPU, cfg.ext_zmmul, false),
/* ePMP 0.9.3 */
DEFINE_PROP_BOOL("x-epmp", RISCVCPU, cfg.epmp, false),
DEFINE_PROP_BOOL("x-aia", RISCVCPU, cfg.aia, false),
--
2.37.2
- [PULL 00/44] riscv-to-apply queue, Alistair Francis, 2022/09/07
- [PULL 04/44] target/riscv: move zmmul out of the experimental properties,
Alistair Francis <=
- [PULL 06/44] target/riscv: Add check for supported privilege mode combinations, Alistair Francis, 2022/09/07
- [PULL 03/44] target/riscv: fix shifts shamt value for rv128c, Alistair Francis, 2022/09/07
- [PULL 13/44] target/riscv: Fix typo and restore Pointer Masking functionality for RISC-V, Alistair Francis, 2022/09/07
- [PULL 05/44] hw/riscv: virt: pass random seed to fdt, Alistair Francis, 2022/09/07
- [PULL 02/44] target/riscv: Force disable extensions if priv spec version does not match, Alistair Francis, 2022/09/07
- [PULL 08/44] target/riscv: Fix checkpatch warning may triggered in csr_ops table, Alistair Francis, 2022/09/07
- [PULL 07/44] target/riscv: H extension depends on I extension, Alistair Francis, 2022/09/07
- [PULL 09/44] target/riscv: Add check for csrs existed with U extension, Alistair Francis, 2022/09/07
- [PULL 10/44] target/riscv: Fix checks in hmode/hmode32, Alistair Francis, 2022/09/07
- [PULL 12/44] roms/opensbi: Upgrade from v1.0 to v1.1, Alistair Francis, 2022/09/07