Re: [PATCH 23/37] target/i386: reimplement 0x0f 0x78-0x7f, add AVX

[Richard Henderson]

On 9/12/22 00:04, Paolo Bonzini wrote:
> +static void gen_MOVD_from(DisasContext *s, CPUX86State *env, X86DecodedInsn 
> *decode)
> +{
> +    MemOp ot = decode->op[2].ot;
> +    int lo_ofs = decode->op[2].offset
> +        - xmm_offset(decode->op[2].ot)
> +        + xmm_offset(ot);
> +
> +    switch (ot) {
> +    case MO_32:
> +#ifdef TARGET_X86_64
> +        tcg_gen_ld_i32(s->tmp2_i32, cpu_env, lo_ofs);
> +        tcg_gen_extu_i32_tl(s->T0, s->tmp2_i32);

tcg_gen_ld32u_tl(s->T0, cpu_env, lo_ofs);

> +static void gen_MOVQ(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
> +{
> +    int vec_len = sse_vec_len(s, decode);
> +    int lo_ofs = decode->op[0].offset
> +        - xmm_offset(decode->op[0].ot)
> +        + xmm_offset(MO_64);
> +
> +    tcg_gen_ld_i64(s->tmp1_i64, cpu_env, decode->op[2].offset);
> +    tcg_gen_gvec_dup_imm(MO_64, decode->op[0].offset, vec_len, vec_len, 0);
> +    tcg_gen_st_i64(s->tmp1_i64, cpu_env, lo_ofs);

tcg_gen_gvec_dup_i64(MO_64, offset, 8, sse_vec_max_len, s->tmp1_i64);


> +static void gen_SSE4a_I(DisasContext *s, CPUX86State *env, X86DecodedInsn 
> *decode)
> +{
> +    TCGv_i32 length = tcg_const_i32(decode->immediate & 255);
> +    TCGv_i32 index = tcg_const_i32(decode->immediate >> 8);
> +
> +    if (s->prefix & PREFIX_DATA) {
> +        gen_helper_extrq_i(cpu_env, s->ptr0, index, length);
> +    } else {
> +        gen_helper_insertq_i(cpu_env, s->ptr0, index, length);
> +    }
> +    tcg_temp_free_i32(length);
> +    tcg_temp_free_i32(index);

Again, why the choice of delayed decode?  I guess it doesn't matter, but it's 
odd.


r~