Re: [PATCH 26/37] target/i386: reimplement 0x0f 0x3a, add AVX

[Richard Henderson]

On 9/12/22 00:04, Paolo Bonzini wrote:
> @@ -839,6 +910,10 @@ static bool decode_insn(DisasContext *s, CPUX86State *env, 
> X86DecodeFunc decode_
>           }
>       }
>       if (e->op3 != X86_TYPE_None) {
> +        /*
> +         * A couple instructions actually use the extra immediate byte for an 
> Lx
> +         * register operand; those are handled in the gen_* functions as one 
> off.
> +         */
>           assert(e->op3 == X86_TYPE_I && e->s3 == X86_SIZE_b);
>           s->rip_offset += 1;
>       }

Comment should be squashed back with the code.

> +static inline void gen_binary_imm_sse(DisasContext *s, CPUX86State *env, 
> X86DecodedInsn *decode,
> +                                      SSEFunc_0_epppi xmm, SSEFunc_0_epppi ymm)
> +{
> +    TCGv_i32 imm = tcg_const_i32(decode->immediate);

tcg_constant_i32.

> +static inline void gen_unary_imm_fp_sse(DisasContext *s, CPUX86State *env, 
> X86DecodedInsn *decode,
> +                                        SSEFunc_0_eppi xmm, SSEFunc_0_eppi ymm)
> +{
> +    TCGv_i32 imm = tcg_const_i32(decode->immediate);

Likewise.

> +static void gen_PALIGNR(DisasContext *s, CPUX86State *env, X86DecodedInsn 
> *decode)
> +{
> +    TCGv_i32 imm = tcg_const_i32(decode->immediate);

Likewise, but could simply be implemented with inline with extract2.

> +static void gen_PCMPESTRI(DisasContext *s, CPUX86State *env, X86DecodedInsn 
> *decode)
> +{
> +    TCGv_i32 imm = tcg_const_i32(decode->immediate);

tcg_constant_i32.

> +static void gen_PCMPESTRM(DisasContext *s, CPUX86State *env, X86DecodedInsn 
> *decode)
> +{
> +    TCGv_i32 imm = tcg_const_i32(decode->immediate);

Likewise.

>   static void gen_PCMPGTB(DisasContext *s, CPUX86State *env, X86DecodedInsn 
> *decode)
>   {
>       int vec_len = sse_vec_len(s, decode);
>         tcg_gen_ld8u_tl(s->T0, s->ptr1, offsetof(ZMMReg, ZMM_B(val)));
> +        break;
> +    case MO_16:
> +        tcg_gen_ld16u_tl(s->T0, s->ptr1, offsetof(ZMMReg, ZMM_W(val)));
> +        break;

Mailer breakage?

> +    if (new_mask != 15) {
> +        if ((val >> 0) & 1)
> +            tcg_gen_st_i32(zero, s->ptr0, offsetof(ZMMReg, ZMM_L(0)));
> +        if ((val >> 1) & 1)
> +            tcg_gen_st_i32(zero, s->ptr0, offsetof(ZMMReg, ZMM_L(1)));
> +        if ((val >> 2) & 1)
> +            tcg_gen_st_i32(zero, s->ptr0, offsetof(ZMMReg, ZMM_L(2)));
> +        if ((val >> 3) & 1)
> +            tcg_gen_st_i32(zero, s->ptr0, offsetof(ZMMReg, ZMM_L(3)));
> +    }

Missing braces.


r~