Re: [PATCH] target/i386: correctly mask SSE4a bit indices in register operands

[Richard Henderson]

On 9/18/22 09:18, Paolo Bonzini wrote:
> SSE4a instructions EXTRQ and INSERTQ have two bit index operands, that can be
> immediates or taken from an XMM register.  In both cases, the fields are
> 6-bit wide and the top two bits in the byte are ignored.  translate.c is
> doing that correctly for the immediate case, but not for the XMM case, so
> fix it.
>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>   target/i386/ops_sse.h | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

But these aren't SSE4a, they're AMD New Media instructions, which was a bit 
confusing.


r~