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Re: [PATCH v2 09/23] target/i386: Use DISAS_EOB_NEXT
From: |
Paolo Bonzini |
Subject: |
Re: [PATCH v2 09/23] target/i386: Use DISAS_EOB_NEXT |
Date: |
Wed, 21 Sep 2022 14:25:02 +0200 |
On Tue, Sep 6, 2022 at 12:09 PM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Replace sequences of gen_update_cc_op, gen_update_eip_next,
> and gen_eob with the new is_jmp enumerator.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
> target/i386/tcg/translate.c | 40 ++++++++++++-------------------------
> 1 file changed, 13 insertions(+), 27 deletions(-)
>
> diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
> index ea35d3e9b4..a7e5bcdec7 100644
> --- a/target/i386/tcg/translate.c
> +++ b/target/i386/tcg/translate.c
> @@ -6987,8 +6987,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
> gen_pop_update(s, ot);
> set_cc_op(s, CC_OP_EFLAGS);
> /* abort translation because TF/AC flag may change */
> - gen_update_eip_next(s);
> - gen_eob(s);
> + s->base.is_jmp = DISAS_EOB_NEXT;
> }
> break;
> case 0x9e: /* sahf */
> @@ -7417,8 +7416,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
> gen_helper_rdmsr(cpu_env);
> } else {
> gen_helper_wrmsr(cpu_env);
> - gen_update_eip_next(s);
> - gen_eob(s);
> + s->base.is_jmp = DISAS_EOB_NEXT;
> }
> }
> break;
> @@ -7617,8 +7615,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
> goto illegal_op;
> }
> gen_helper_clac(cpu_env);
> - gen_update_eip_next(s);
> - gen_eob(s);
> + s->base.is_jmp = DISAS_EOB_NEXT;
> break;
>
> case 0xcb: /* stac */
> @@ -7627,8 +7624,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
> goto illegal_op;
> }
> gen_helper_stac(cpu_env);
> - gen_update_eip_next(s);
> - gen_eob(s);
> + s->base.is_jmp = DISAS_EOB_NEXT;
> break;
>
> CASE_MODRM_MEM_OP(1): /* sidt */
> @@ -7672,8 +7668,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
> tcg_gen_trunc_tl_i32(s->tmp2_i32, cpu_regs[R_ECX]);
> gen_helper_xsetbv(cpu_env, s->tmp2_i32, s->tmp1_i64);
> /* End TB because translation flags may change. */
> - gen_update_eip_next(s);
> - gen_eob(s);
> + s->base.is_jmp = DISAS_EOB_NEXT;
> break;
>
> case 0xd8: /* VMRUN */
> @@ -7734,8 +7729,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
> }
> gen_update_cc_op(s);
> gen_helper_stgi(cpu_env);
> - gen_update_eip_next(s);
> - gen_eob(s);
> + s->base.is_jmp = DISAS_EOB_NEXT;
> break;
>
> case 0xdd: /* CLGI */
> @@ -7773,8 +7767,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
> tcg_gen_ext32u_tl(s->A0, cpu_regs[R_EAX]);
> }
> gen_helper_flush_page(cpu_env, s->A0);
> - gen_update_eip_next(s);
> - gen_eob(s);
> + s->base.is_jmp = DISAS_EOB_NEXT;
> break;
>
> CASE_MODRM_MEM_OP(2): /* lgdt */
> @@ -7857,8 +7850,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
> tcg_gen_andi_tl(s->T1, s->T1, ~0xe);
> tcg_gen_or_tl(s->T0, s->T0, s->T1);
> gen_helper_write_crN(cpu_env, tcg_constant_i32(0), s->T0);
> - gen_update_eip_next(s);
> - gen_eob(s);
> + s->base.is_jmp = DISAS_EOB_NEXT;
> break;
>
> CASE_MODRM_MEM_OP(7): /* invlpg */
> @@ -7868,8 +7860,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
> gen_svm_check_intercept(s, SVM_EXIT_INVLPG);
> gen_lea_modrm(env, s, modrm);
> gen_helper_flush_page(cpu_env, s->A0);
> - gen_update_eip_next(s);
> - gen_eob(s);
> + s->base.is_jmp = DISAS_EOB_NEXT;
> break;
>
> case 0xf8: /* swapgs */
> @@ -8268,8 +8259,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
> gen_svm_check_intercept(s, SVM_EXIT_WRITE_CR0 + reg);
> gen_op_mov_v_reg(s, ot, s->T0, rm);
> gen_helper_write_crN(cpu_env, tcg_constant_i32(reg), s->T0);
> - gen_update_eip_next(s);
> - gen_eob(s);
> + s->base.is_jmp = DISAS_EOB_NEXT;
> } else {
> gen_svm_check_intercept(s, SVM_EXIT_READ_CR0 + reg);
> gen_helper_read_crN(s->T0, cpu_env, tcg_constant_i32(reg));
> @@ -8303,8 +8293,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
> gen_op_mov_v_reg(s, ot, s->T0, rm);
> tcg_gen_movi_i32(s->tmp2_i32, reg);
> gen_helper_set_dr(cpu_env, s->tmp2_i32, s->T0);
> - gen_update_eip_next(s);
> - gen_eob(s);
> + s->base.is_jmp = DISAS_EOB_NEXT;
> } else {
> gen_svm_check_intercept(s, SVM_EXIT_READ_DR0 + reg);
> tcg_gen_movi_i32(s->tmp2_i32, reg);
> @@ -8318,8 +8307,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
> gen_svm_check_intercept(s, SVM_EXIT_WRITE_CR0);
> gen_helper_clts(cpu_env);
> /* abort block because static cpu state changed */
> - gen_update_eip_next(s);
> - gen_eob(s);
> + s->base.is_jmp = DISAS_EOB_NEXT;
> }
> break;
> /* MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4 support */
> @@ -8415,9 +8403,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
> gen_helper_xrstor(cpu_env, s->A0, s->tmp1_i64);
> /* XRSTOR is how MPX is enabled, which changes how
> we translate. Thus we need to end the TB. */
> - gen_update_cc_op(s);
> - gen_update_eip_next(s);
> - gen_eob(s);
> + s->base.is_jmp = DISAS_EOB_NEXT;
> break;
>
> CASE_MODRM_MEM_OP(6): /* xsaveopt / clwb */
> --
> 2.34.1
>
- Re: [PATCH v2 10/23] target/i386: USe DISAS_EOB_ONLY, (continued)
- [PATCH v2 15/23] target/i386: Create eip_next_*, Richard Henderson, 2022/09/06
- [PATCH v2 17/23] target/i386: Create gen_jmp_rel, Richard Henderson, 2022/09/06
- [PATCH v2 19/23] target/i386: Use gen_jmp_rel for gen_jcc, Richard Henderson, 2022/09/06
- [PATCH v2 08/23] target/i386: Use DISAS_EOB* in gen_movl_seg_T0, Richard Henderson, 2022/09/06
- [PATCH v2 09/23] target/i386: Use DISAS_EOB_NEXT, Richard Henderson, 2022/09/06
- Re: [PATCH v2 09/23] target/i386: Use DISAS_EOB_NEXT,
Paolo Bonzini <=
- [PATCH v2 11/23] target/i386: Create cur_insn_len, cur_insn_len_i32, Richard Henderson, 2022/09/06
- [PATCH v2 13/23] target/i386: Introduce DISAS_JUMP, Richard Henderson, 2022/09/06
- [PATCH v2 20/23] target/i386: Use gen_jmp_rel for gen_repz*, Richard Henderson, 2022/09/06
- [PATCH v2 16/23] target/i386: Use DISAS_TOO_MANY to exit after gen_io_start, Richard Henderson, 2022/09/06