Re: [PATCH v11 05/15] target/hexagon: introduce new helper functions

[Philippe Mathieu-Daudé]

On 4/8/22 13:55, Anton Johansson via wrote:
> From: Niccolò Izzo <nizzo@rev.ng>
>
> These helpers will be employed by the idef-parser generated code, to
> correctly implement instruction semantics. "Helper" functions, in the
> context of this patch, refers to functions which provide a manual TCG
> implementation of certain features.
>
> Signed-off-by: Alessandro Di Federico <ale@rev.ng>
> Signed-off-by: Niccolò Izzo <nizzo@rev.ng>
> Signed-off-by: Anton Johansson <anjo@rev.ng>
> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
> ---
>   target/hexagon/genptr.c | 178 ++++++++++++++++++++++++++++++++++++++--
>   target/hexagon/genptr.h |  17 +++-
>   target/hexagon/macros.h |   9 ++
>   3 files changed, 196 insertions(+), 8 deletions(-)

> diff --git a/target/hexagon/genptr.h b/target/hexagon/genptr.h
> index 016d5d7085..6c50c5383b 100644
> --- a/target/hexagon/genptr.h
> +++ b/target/hexagon/genptr.h
> @@ -24,7 +24,8 @@
>   
>   extern const SemanticInsn opcode_genptr[];
>   
> -void gen_store32(TCGv vaddr, TCGv src, int width, uint32_t slot);
> +void gen_store32(DisasContext *ctx, TCGv vaddr, TCGv src, tcg_target_long 
> width,
> +                 uint32_t slot);
>   void gen_store1(TCGv_env cpu_env, TCGv vaddr, TCGv src, DisasContext *ctx,
>                   uint32_t slot);
>   void gen_store2(TCGv_env cpu_env, TCGv vaddr, TCGv src, DisasContext *ctx,
> @@ -41,9 +42,23 @@ void gen_store4i(TCGv_env cpu_env, TCGv vaddr, int32_t src, 
> DisasContext *ctx,
>                    uint32_t slot);
>   void gen_store8i(TCGv_env cpu_env, TCGv vaddr, int64_t src, DisasContext *ctx,
>                    uint32_t slot);

Preferably various 'uint32_t' -> 'unsigned'.

> +TCGv gen_read_reg(TCGv result, int num);

'unsigned'.

>   TCGv gen_read_preg(TCGv pred, uint8_t num);
>   void gen_log_reg_write(int rnum, TCGv val);
>   void gen_log_pred_write(DisasContext *ctx, int pnum, TCGv val);
> +void gen_write_new_pc(TCGv addr);
> +void gen_set_usr_field(int field, TCGv val);
> +void gen_set_usr_fieldi(int field, int x);
> +void gen_set_usr_field_if(int field, TCGv val);
> +void gen_sat_i32(TCGv dest, TCGv source, int width);
> +void gen_sat_i32_ovfl(TCGv ovfl, TCGv dest, TCGv source, int width);
> +void gen_satu_i32(TCGv dest, TCGv source, int width);
> +void gen_satu_i32_ovfl(TCGv ovfl, TCGv dest, TCGv source, int width);
> +void gen_sat_i64(TCGv_i64 dest, TCGv_i64 source, int width);
> +void gen_sat_i64_ovfl(TCGv ovfl, TCGv_i64 dest, TCGv_i64 source, int width);
> +void gen_satu_i64(TCGv_i64 dest, TCGv_i64 source, int width);
> +void gen_satu_i64_ovfl(TCGv ovfl, TCGv_i64 dest, TCGv_i64 source, int width);
> +void gen_add_sat_i64(TCGv_i64 ret, TCGv_i64 a, TCGv_i64 b);
>   TCGv gen_8bitsof(TCGv result, TCGv value);
>   void gen_set_byte_i64(int N, TCGv_i64 result, TCGv src);
>   TCGv gen_get_byte(TCGv result, int N, TCGv src, bool sign);
> diff --git a/target/hexagon/macros.h b/target/hexagon/macros.h
> index 4529af107a..4c2e3ce21e 100644
> --- a/target/hexagon/macros.h
> +++ b/target/hexagon/macros.h
> @@ -197,7 +197,16 @@
>   #define MEM_STORE8(VA, DATA, SLOT) log_store64(env, VA, DATA, 8, SLOT)
>   #endif
>   
> +#ifdef QEMU_GENERATE
> +static inline void gen_cancel(uint32_t slot)

Preferably 'unsigned'.

> +{
> +    tcg_gen_ori_tl(hex_slot_cancelled, hex_slot_cancelled, 1 << slot);
> +}
> +
> +#define CANCEL gen_cancel(slot);
> +#else
>   #define CANCEL cancel_slot(env, slot)
> +#endif
>   
>   #define LOAD_CANCEL(EA) do { CANCEL; } while (0)
>