Re: [PATCH v3 5/9] target/arm: Add ARMCacheAttrs to the signature of pmsav8_mpu_lookup

[Peter Maydell]

On Sat, 20 Aug 2022 at 15:19, <tobias.roehmel@rwth-aachen.de> wrote:
>
> From: Tobias Röhmel <tobias.roehmel@rwth-aachen.de>
>
> Add ARMCacheAttrs to the signature of pmsav8_mpu_lookup to prepare
> for the Cortex-R52 MPU which uses and combines cache attributes
> of different translation levels.
>
> Signed-off-by: Tobias Röhmel <tobias.roehmel@rwth-aachen.de>

> +bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address,
> +                       MMUAccessType access_type, ARMMMUIdx mmu_idx,
> +                       hwaddr *phys_ptr, MemTxAttrs *txattrs,
> +                       int *prot, bool *is_subpage,
> +                       ARMMMUFaultInfo *fi, uint32_t *mregion,
> +                       ARMCacheAttrs *cacheattrs);

When you next rebase this series on current upstream, you'll find
there's been a refactoring of the ptw.c code, so that instead of
passing half a dozen pointers to each function, we pass a
single GetPhysAddrResult* for the function to fill in. That
struct includes an "ARMCacheAttrs cacheattrs" field, so
pmsav8_mpu_lookup() has access to fill it in, and this
patch won't be necessary.

thanks
-- PMM