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Re: [PATCH v3 6/9] target/arm: Enable TTBCR_EAE for ARMv8-R AArch32


From: Peter Maydell
Subject: Re: [PATCH v3 6/9] target/arm: Enable TTBCR_EAE for ARMv8-R AArch32
Date: Tue, 27 Sep 2022 14:20:42 +0100

On Sat, 20 Aug 2022 at 15:19, <tobias.roehmel@rwth-aachen.de> wrote:
>
> From: Tobias Röhmel <tobias.roehmel@rwth-aachen.de>
>
> ARMv8-R AArch32 CPUs behave as if TTBCR.EAE is always 1 even
> tough they don't have the TTBCR register.
> See ARM Architecture Reference Manual Supplement - ARMv8, for the ARMv8-R
> AArch32 architecture profile Version:A.c section C1.2.
>
> Signed-off-by: Tobias Röhmel <tobias.roehmel@rwth-aachen.de>
> ---
>  target/arm/debug_helper.c | 3 ++-
>  target/arm/internals.h    | 3 ++-
>  target/arm/tlb_helper.c   | 3 ++-
>  3 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c
> index b18a6bd3a2..44b1e32974 100644
> --- a/target/arm/debug_helper.c
> +++ b/target/arm/debug_helper.c
> @@ -434,7 +434,8 @@ static uint32_t arm_debug_exception_fsr(CPUARMState *env)
>          using_lpae = true;
>      } else {
>          if (arm_feature(env, ARM_FEATURE_LPAE) &&
> -            (env->cp15.tcr_el[target_el].raw_tcr & TTBCR_EAE)) {
> +            ((env->cp15.tcr_el[target_el].raw_tcr & TTBCR_EAE)
> +            || arm_feature(env, ARM_FEATURE_V8_R))) {
>              using_lpae = true;
>          }
>      }
> diff --git a/target/arm/internals.h b/target/arm/internals.h
> index b03049d920..e2a2b03d41 100644
> --- a/target/arm/internals.h
> +++ b/target/arm/internals.h
> @@ -254,7 +254,8 @@ static inline bool extended_addresses_enabled(CPUARMState 
> *env)
>  {
>      TCR *tcr = &env->cp15.tcr_el[arm_is_secure(env) ? 3 : 1];
>      return arm_el_is_aa64(env, 1) ||
> -           (arm_feature(env, ARM_FEATURE_LPAE) && (tcr->raw_tcr & 
> TTBCR_EAE));
> +           (arm_feature(env, ARM_FEATURE_LPAE) && ((tcr->raw_tcr & TTBCR_EAE)
> +           || arm_feature(env, ARM_FEATURE_V8_R)));
>  }
>
>  /* Update a QEMU watchpoint based on the information the guest has set in the
> diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c
> index 7d8a86b3c4..891326edb8 100644
> --- a/target/arm/tlb_helper.c
> +++ b/target/arm/tlb_helper.c
> @@ -20,7 +20,8 @@ bool regime_using_lpae_format(CPUARMState *env, ARMMMUIdx 
> mmu_idx)
>          return true;
>      }
>      if (arm_feature(env, ARM_FEATURE_LPAE)
> -        && (regime_tcr(env, mmu_idx)->raw_tcr & TTBCR_EAE)) {
> +        && ((regime_tcr(env, mmu_idx)->raw_tcr & TTBCR_EAE)
> +        || arm_feature(env, ARM_FEATURE_V8_R))) {
>          return true;
>      }
>      return false;

In all of these I think you've put the "is this v8R?" condition
in a weird place in the existing conditional structure. v8R
always uses the extended-address format, so we should have
the test at the same kind of level we have the "is this AArch64?"
test, not buried inside the "if LPAE" test.

Also, you can write the check
  (arm_feature(env, ARM_FEATURE_V8) && arm_feature(ARM_FEATURE_PMSA))
-- I still don't think there is any need for a separate V8_R
feature bit.

thanks
-- PMM



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