Re: [PATCH] target/arm: Use the max page size in a 2-stage ptw

[Marc Zyngier]

On Wed, 28 Sep 2022 05:34:53 +0100,
Zenghui Yu <yuzenghui@huawei.com> wrote:
> 
> [ Fix Marc's email address ]

Ah, many thanks Zenghui! I was wondering whether my discussion with
Richard had any result. As it turns out, it had an almost immediate
result!

> 
> On 2022/9/13 21:56, Richard Henderson wrote:
> > We had only been reporting the stage2 page size.  This causes
> > problems if stage1 is using a larger page size (16k, 2M, etc),
> > but stage2 is using a smaller page size, because cputlb does
> > not set large_page_{addr,mask} properly.
> > 
> > Fix by using the max of the two page sizes.
> > 
> > Reported-by: Marc Zyngier <marc.zyngier@arm.com>

This is no longer a thing (and hasn't been for over 3 years!  ;-).
maz@kernel.org is the canonical address.

> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> > ---
> > 
> > Hi Mark, I think this will fix the issue that you mentioned on Monday.
> > It certainly appears to fit the bill vs the described symptoms.
> > 
> > This is based on my ptw.c rewrite, full tree at
> > 
> >     https://gitlab.com/rth7680/qemu/-/tree/tgt-arm-rme
> > 
> > Based-on: 20220822152741.1617527-1-richard.henderson@linaro.org
> > ("[PATCH v2 00/66] target/arm: Implement FEAT_HAFDBS")

Thanks Richard. I'll try and give it a spin shortly.

Cheers,

        M.

-- 
Without deviation from the norm, progress is not possible.