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Re: [PATCH 1/3] target/arm: Mark registers which call pmu_op_start() as


From: Richard Henderson
Subject: Re: [PATCH 1/3] target/arm: Mark registers which call pmu_op_start() as ARM_CP_IO
Date: Wed, 28 Sep 2022 05:11:12 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0

On 9/23/22 05:34, Peter Maydell wrote:
In commit 01765386a888 we made some system register write functions
call pmu_op_start()/pmu_op_finish(). This means that they now touch
timers, so for icount to work these registers must have the ARM_CP_IO
flag set.

This fixes a bug where when icount is enabled a guest that touches
MDCR_EL3, MDCR_EL2, PMCNTENSET_EL0 or PMCNTENCLR_EL0 would cause
QEMU to print an error message and exit, for example:

[    2.495971] TCP: Hash tables configured (established 1024 bind 1024)
[    2.496213] UDP hash table entries: 256 (order: 1, 8192 bytes)
[    2.496386] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
[    2.496917] NET: Registered protocol family 1
qemu-system-aarch64: Bad icount read

Reported-by: Thomas Huth<thuth@redhat.com>
Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
---
  target/arm/helper.c | 12 ++++++------
  1 file changed, 6 insertions(+), 6 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~



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