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Re: [PATCH v5 00/17] tcg: CPUTLBEntryFull and TARGET_TB_PCREL


From: Richard Henderson
Subject: Re: [PATCH v5 00/17] tcg: CPUTLBEntryFull and TARGET_TB_PCREL
Date: Wed, 28 Sep 2022 19:16:57 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0

On 9/25/22 03:51, Richard Henderson wrote:
Smooshing these two patch sets back together for review bandwidth.
I hope to make this the next tcg-next pull.

There are three from the first half, tlbentryfull, which are new.
These are following a hallway conversation with Peter about bits
in MemTxAttrs that are not actually related to memory transactions,
and infrastructure to address a to-do in an Arm patch set.

There are a few patches from the second half, pcrel, that have not
been reviewed.

   07-target-sparc-Use-tlb_set_page_full.patch
   08-accel-tcg-Move-byte_swap-from-MemTxAttrs-to-CPUTL.patch
   09-accel-tcg-Add-force_aligned-to-CPUTLBEntryFull.patch
   10-accel-tcg-Remove-PageDesc-code_bitmap.patch
   13-accel-tcg-Do-not-align-tb-page_addr-0.patch
   15-accel-tcg-Introduce-tb_pc-and-tb_pc_log.patch
   16-accel-tcg-Introduce-TARGET_TB_PCREL.patch

FWIW, the target/sparc patch fails (the peril of insufficiently tested airport updates), so I'm going to drop 7+8 until I have time to investigate. I'm also going to drop patch 9 for now, and present it alongside the Arm patch that will use it.

But otherwise, gentle ping.


r~



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