Re: [PATCH v2 1/4] target/loongarch: ftint_xxx insns set the result high 32bit 0xffffffff

[gaosong]

在 2022/9/28 下午11:14, Richard Henderson 写道:

> On
>       9/26/22 23:48, Song Gao wrote:
>       
> > we just set high 32bit 0xffffffff as the
> >         other float instructions do.
> >         
> >         
> >         Signed-off-by: Song Gao<gaosong@loongson.cn>
> >         
> >         ---
> >         
> >           target/loongarch/fpu_helper.c | 18 +++++++++---------
> >         
> >           1 file changed, 9 insertions(+), 9 deletions(-)
> >         
> >       
>       
>       But the result in these cases is an integer, not a
>       (single-precision) float.
>       
>       Is this really what hardware does?
>       
>       
>     
    The high 32bit value is not fixed  as the manual 3.1.3.1 said:
        ' When the floating-point register records a
      single-precision floating-point number or word integer, the data
        always appears in the [31:0] bits of the
      floating-point register, at this time the [63:32] bits of the
        floating-point register can be any value.'
    I do this  just used for RISU test compare these instructions result
    value.  
    As the RISU patches not reviewed,  I can drop this patch.
    
    Thanks.
    Song Gao