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Re: [RFC PATCH v2 03/29] target/ppc: split interrupt masking and deliver
From: |
Fabiano Rosas |
Subject: |
Re: [RFC PATCH v2 03/29] target/ppc: split interrupt masking and delivery from ppc_hw_interrupt |
Date: |
Fri, 30 Sep 2022 12:55:52 -0300 |
Matheus Ferst <matheus.ferst@eldorado.org.br> writes:
> Split ppc_hw_interrupt into an interrupt masking method,
> ppc_next_unmasked_interrupt, and an interrupt processing method,
> ppc_deliver_interrupt.
>
<snip>
> @@ -1822,20 +1782,106 @@ static void ppc_hw_interrupt(CPUPPCState *env)
> */
> if (FIELD_EX64(env->msr, MSR, PR) &&
> (env->spr[SPR_BESCR] & BESCR_GE)) {
> - env->pending_interrupts &= ~PPC_INTERRUPT_EBB;
> -
> - if (env->spr[SPR_BESCR] & BESCR_PMEO) {
> - powerpc_excp(cpu, POWERPC_EXCP_PERFM_EBB);
> - } else if (env->spr[SPR_BESCR] & BESCR_EEO) {
> - powerpc_excp(cpu, POWERPC_EXCP_EXTERNAL_EBB);
> - }
> -
> - return;
> + return PPC_INTERRUPT_EBB;
> }
> }
> }
>
> - if (env->resume_as_sreset) {
> + return 0;
> +}
> +
> +static void ppc_deliver_interrupt(CPUPPCState *env, int interrupt)
> +{
> + PowerPCCPU *cpu = env_archcpu(env);
> + CPUState *cs = env_cpu(env);
> +
> + switch (interrupt) {
> + case PPC_INTERRUPT_RESET: /* External reset */
> + env->pending_interrupts &= ~PPC_INTERRUPT_RESET;
> + powerpc_excp(cpu, POWERPC_EXCP_RESET);
> + break;
> + case PPC_INTERRUPT_MCK: /* Machine check exception */
> + env->pending_interrupts &= ~PPC_INTERRUPT_MCK;
> + powerpc_excp(cpu, POWERPC_EXCP_MCHECK);
> + break;
> +#if 0 /* TODO */
> + case PPC_INTERRUPT_DEBUG: /* External debug exception */
> + env->pending_interrupts &= ~PPC_INTERRUPT_DEBUG;
> + powerpc_excp(cpu, POWERPC_EXCP_DEBUG);
> + break;
> +#endif
> +
> + case PPC_INTERRUPT_HDECR: /* Hypervisor decrementer exception */
> + /* HDEC clears on delivery */
> + env->pending_interrupts &= ~PPC_INTERRUPT_HDECR;
> + powerpc_excp(cpu, POWERPC_EXCP_HDECR);
> + break;
> + case PPC_INTERRUPT_HVIRT: /* Hypervisor virtualization interrupt */
> + powerpc_excp(cpu, POWERPC_EXCP_HVIRT);
> + break;
> +
> + case PPC_INTERRUPT_EXT:
> + if (books_vhyp_promotes_external_to_hvirt(cpu)) {
> + powerpc_excp(cpu, POWERPC_EXCP_HVIRT);
> + } else {
> + powerpc_excp(cpu, POWERPC_EXCP_EXTERNAL);
> + }
> + break;
> + case PPC_INTERRUPT_CEXT: /* External critical interrupt */
> + powerpc_excp(cpu, POWERPC_EXCP_CRITICAL);
> + break;
> +
> + case PPC_INTERRUPT_WDT: /* Watchdog timer on embedded PowerPC */
> + env->pending_interrupts &= ~PPC_INTERRUPT_WDT;
> + powerpc_excp(cpu, POWERPC_EXCP_WDT);
> + break;
> + case PPC_INTERRUPT_CDOORBELL:
> + env->pending_interrupts &= ~PPC_INTERRUPT_CDOORBELL;
> + powerpc_excp(cpu, POWERPC_EXCP_DOORCI);
> + break;
> + case PPC_INTERRUPT_FIT: /* Fixed interval timer on embedded PowerPC */
> + env->pending_interrupts &= ~PPC_INTERRUPT_FIT;
> + powerpc_excp(cpu, POWERPC_EXCP_FIT);
> + break;
> + case PPC_INTERRUPT_PIT: /* Programmable interval timer on embedded
> PowerPC */
> + env->pending_interrupts &= ~PPC_INTERRUPT_PIT;
> + powerpc_excp(cpu, POWERPC_EXCP_PIT);
> + break;
> + case PPC_INTERRUPT_DECR: /* Decrementer exception */
> + if (ppc_decr_clear_on_delivery(env)) {
> + env->pending_interrupts &= ~PPC_INTERRUPT_DECR;
> + }
> + powerpc_excp(cpu, POWERPC_EXCP_DECR);
> + break;
> + case PPC_INTERRUPT_DOORBELL:
> + env->pending_interrupts &= ~PPC_INTERRUPT_DOORBELL;
> + if (is_book3s_arch2x(env)) {
> + powerpc_excp(cpu, POWERPC_EXCP_SDOOR);
> + } else {
> + powerpc_excp(cpu, POWERPC_EXCP_DOORI);
> + }
> + break;
> + case PPC_INTERRUPT_HDOORBELL:
> + env->pending_interrupts &= ~PPC_INTERRUPT_HDOORBELL;
> + powerpc_excp(cpu, POWERPC_EXCP_SDOOR_HV);
> + break;
> + case PPC_INTERRUPT_PERFM:
> + env->pending_interrupts &= ~PPC_INTERRUPT_PERFM;
> + powerpc_excp(cpu, POWERPC_EXCP_PERFM);
> + break;
> + case PPC_INTERRUPT_THERM: /* Thermal interrupt */
> + env->pending_interrupts &= ~PPC_INTERRUPT_THERM;
> + powerpc_excp(cpu, POWERPC_EXCP_THERM);
> + break;
> + case PPC_INTERRUPT_EBB: /* EBB exception */
> + env->pending_interrupts &= ~PPC_INTERRUPT_EBB;
> + if (env->spr[SPR_BESCR] & BESCR_PMEO) {
> + powerpc_excp(cpu, POWERPC_EXCP_PERFM_EBB);
> + } else if (env->spr[SPR_BESCR] & BESCR_EEO) {
> + powerpc_excp(cpu, POWERPC_EXCP_EXTERNAL_EBB);
> + }
> + break;
> + case 0:
> /*
> * This is a bug ! It means that has_work took us out of halt without
> * anything to deliver while in a PM state that requires getting
> @@ -1847,8 +1893,10 @@ static void ppc_hw_interrupt(CPUPPCState *env)
> * It generally means a discrepancy between the wakeup conditions in
> the
> * processor has_work implementation and the logic in this function.
> */
> - cpu_abort(env_cpu(env),
> - "Wakeup from PM state but interrupt Undelivered");
> + assert(env->resume_as_sreset != 0);
This should be: assert(!env->resume_as_sreset);
> + break;
> + default:
> + cpu_abort(cs, "Invalid PowerPC interrupt %d. Aborting\n", interrupt);
> }
> }
>
> @@ -1884,15 +1932,22 @@ bool ppc_cpu_exec_interrupt(CPUState *cs, int
> interrupt_request)
> {
> PowerPCCPU *cpu = POWERPC_CPU(cs);
> CPUPPCState *env = &cpu->env;
> + int interrupt;
>
> - if (interrupt_request & CPU_INTERRUPT_HARD) {
> - ppc_hw_interrupt(env);
> - if (env->pending_interrupts == 0) {
> - cs->interrupt_request &= ~CPU_INTERRUPT_HARD;
> - }
> - return true;
> + if ((interrupt_request & CPU_INTERRUPT_HARD) == 0) {
> + return false;
> }
> - return false;
> +
> + interrupt = ppc_next_unmasked_interrupt(env);
> + if (interrupt == 0) {
> + return false;
> + }
> +
> + ppc_deliver_interrupt(env, interrupt);
> + if (env->pending_interrupts == 0) {
> + cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
> + }
> + return true;
> }
>
> #endif /* !CONFIG_USER_ONLY */
- [RFC PATCH v2 00/29] PowerPC interrupt rework, Matheus Ferst, 2022/09/27
- [RFC PATCH v2 01/29] target/ppc: define PPC_INTERRUPT_* values directly, Matheus Ferst, 2022/09/27
- [RFC PATCH v2 02/29] target/ppc: always use ppc_set_irq to set env->pending_interrupts, Matheus Ferst, 2022/09/27
- [RFC PATCH v2 03/29] target/ppc: split interrupt masking and delivery from ppc_hw_interrupt, Matheus Ferst, 2022/09/27
- Re: [RFC PATCH v2 03/29] target/ppc: split interrupt masking and delivery from ppc_hw_interrupt,
Fabiano Rosas <=
- [RFC PATCH v2 05/29] target/ppc: create an interrupt masking method for POWER9/POWER10, Matheus Ferst, 2022/09/27
- [RFC PATCH v2 04/29] target/ppc: prepare to split interrupt masking and delivery by excp_model, Matheus Ferst, 2022/09/27
- [RFC PATCH v2 06/29] target/ppc: remove unused interrupts from p9_pending_interrupt, Matheus Ferst, 2022/09/27
- [RFC PATCH v2 08/29] target/ppc: remove unused interrupts from p9_deliver_interrupt, Matheus Ferst, 2022/09/27
- [RFC PATCH v2 07/29] target/ppc: create an interrupt delivery method for POWER9/POWER10, Matheus Ferst, 2022/09/27
- [RFC PATCH v2 09/29] target/ppc: remove generic architecture checks from p9_deliver_interrupt, Matheus Ferst, 2022/09/27
- [RFC PATCH v2 10/29] target/ppc: move power-saving interrupt masking out of cpu_has_work_POWER9, Matheus Ferst, 2022/09/27
- [RFC PATCH v2 11/29] target/ppc: add power-saving interrupt masking logic to p9_next_unmasked_interrupt, Matheus Ferst, 2022/09/27