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Re: [PATCH v6 00/18] tcg: CPUTLBEntryFull and TARGET_TB_PCREL


From: Richard Henderson
Subject: Re: [PATCH v6 00/18] tcg: CPUTLBEntryFull and TARGET_TB_PCREL
Date: Fri, 30 Sep 2022 14:29:32 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0

Good grief: typo in the cc list, twice.
You'd think I'd know where I work by now...


r~

On 9/30/22 14:26, Richard Henderson wrote:
Changes for v6:
   * CPUTLBEntryFull is now completely reviewed.

   * Incorporated the CPUClass caching patches,
     as I will add a new use of the cached value.

   * Move CPUJumpCache out of include/hw/core.h.  While looking at
     Alex's review of the patch, I realized that adding the virtual
     pc value unconditionally would consume 64kB per cpu on targets
     that do not require it.  Further, making it dynamically allocated
     (a consequence of core.h not having the structure definition to
     add to CPUState), means that we save 64kB per cpu when running
     with hardware virtualization (kvm, xen, etc).

   * Add CPUClass.get_pc, so that we can always use or filter on the
     virtual address when logging.

Patches needing review:

   13-accel-tcg-Do-not-align-tb-page_addr-0.patch
   14-accel-tcg-Inline-tb_flush_jmp_cache.patch (new)
   16-hw-core-Add-CPUClass.get_pc.patch (new)
   17-accel-tcg-Introduce-tb_pc-and-log_pc.patch (mostly new)
   18-accel-tcg-Introduce-TARGET_TB_PCREL.patch


r~


Alex Bennée (3):
   cpu: cache CPUClass in CPUState for hot code paths
   hw/core/cpu-sysemu: used cached class in cpu_asidx_from_attrs
   cputlb: used cached CPUClass in our hot-paths

Richard Henderson (15):
   accel/tcg: Rename CPUIOTLBEntry to CPUTLBEntryFull
   accel/tcg: Drop addr member from SavedIOTLB
   accel/tcg: Suppress auto-invalidate in probe_access_internal
   accel/tcg: Introduce probe_access_full
   accel/tcg: Introduce tlb_set_page_full
   include/exec: Introduce TARGET_PAGE_ENTRY_EXTRA
   accel/tcg: Remove PageDesc code_bitmap
   accel/tcg: Use bool for page_find_alloc
   accel/tcg: Use DisasContextBase in plugin_gen_tb_start
   accel/tcg: Do not align tb->page_addr[0]
   accel/tcg: Inline tb_flush_jmp_cache
   include/hw/core: Create struct CPUJumpCache
   hw/core: Add CPUClass.get_pc
   accel/tcg: Introduce tb_pc and log_pc
   accel/tcg: Introduce TARGET_TB_PCREL

  accel/tcg/internal.h                    |  10 +
  accel/tcg/tb-hash.h                     |   1 +
  accel/tcg/tb-jmp-cache.h                |  29 +++
  include/exec/cpu-common.h               |   1 +
  include/exec/cpu-defs.h                 |  48 ++++-
  include/exec/exec-all.h                 |  75 ++++++-
  include/exec/plugin-gen.h               |   7 +-
  include/hw/core/cpu.h                   |  28 ++-
  include/qemu/typedefs.h                 |   1 +
  include/tcg/tcg.h                       |   2 +-
  accel/tcg/cpu-exec.c                    | 122 +++++++----
  accel/tcg/cputlb.c                      | 259 ++++++++++++++----------
  accel/tcg/plugin-gen.c                  |  22 +-
  accel/tcg/translate-all.c               | 200 ++++++++----------
  accel/tcg/translator.c                  |   2 +-
  cpu.c                                   |   9 +-
  hw/core/cpu-common.c                    |   3 +-
  hw/core/cpu-sysemu.c                    |   5 +-
  plugins/core.c                          |   2 +-
  target/alpha/cpu.c                      |   9 +
  target/arm/cpu.c                        |  17 +-
  target/arm/mte_helper.c                 |  14 +-
  target/arm/sve_helper.c                 |   4 +-
  target/arm/translate-a64.c              |   2 +-
  target/avr/cpu.c                        |  10 +-
  target/cris/cpu.c                       |   8 +
  target/hexagon/cpu.c                    |  10 +-
  target/hppa/cpu.c                       |  12 +-
  target/i386/cpu.c                       |   9 +
  target/i386/tcg/tcg-cpu.c               |   2 +-
  target/loongarch/cpu.c                  |  11 +-
  target/m68k/cpu.c                       |   8 +
  target/microblaze/cpu.c                 |  10 +-
  target/mips/cpu.c                       |   8 +
  target/mips/tcg/exception.c             |   2 +-
  target/mips/tcg/sysemu/special_helper.c |   2 +-
  target/nios2/cpu.c                      |   9 +
  target/openrisc/cpu.c                   |  10 +-
  target/ppc/cpu_init.c                   |   8 +
  target/riscv/cpu.c                      |  17 +-
  target/rx/cpu.c                         |  10 +-
  target/s390x/cpu.c                      |   8 +
  target/s390x/tcg/mem_helper.c           |   4 -
  target/sh4/cpu.c                        |  12 +-
  target/sparc/cpu.c                      |  10 +-
  target/tricore/cpu.c                    |  11 +-
  target/xtensa/cpu.c                     |   8 +
  tcg/tcg.c                               |   8 +-
  trace/control-target.c                  |   2 +-
  49 files changed, 723 insertions(+), 358 deletions(-)
  create mode 100644 accel/tcg/tb-jmp-cache.h





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