Re: [PATCH 4/6] target/riscv: Add *envcfg.PBMTE related check in address translation

[Daniel Henrique Barboza]

On 2/24/23 01:08, Weiwei Li wrote:
> menvcfg.PBMTE bit controls whether the Svpbmt extension is available
> for use in S-mode and G-stage address translation.
>
> henvcfg.PBMTE bit controls whether the Svpbmt extension is available
> for use in VS-stage address translation.
>
> Set *envcfg.PBMTE default true for backward compatibility.
>
> Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
> ---

Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

>   target/riscv/cpu.c        |  3 +++
>   target/riscv/cpu_helper.c | 10 ++++++++--
>   2 files changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 0dd2f0c753..2d99679f2f 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -613,6 +613,9 @@ static void riscv_cpu_reset_hold(Object *obj)
>       env->bins = 0;
>       env->two_stage_lookup = false;
>   
> +    env->menvcfg = (cpu->cfg.ext_svpbmt ? MENVCFG_PBMTE : 0);
> +    env->henvcfg = (cpu->cfg.ext_svpbmt ? HENVCFG_PBMTE : 0);
> +
>       /* Initialized default priorities of local interrupts. */
>       for (i = 0; i < ARRAY_SIZE(env->miprio); i++) {
>           iprio = riscv_cpu_default_priority(i);
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index ad8d82662c..552c0f0b58 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -936,9 +936,15 @@ restart:
>               return TRANSLATE_FAIL;
>           }
>   
> +        bool pbmte = env->menvcfg & MENVCFG_PBMTE;
> +
> +        if (first_stage && two_stage && riscv_cpu_virt_enabled(env)) {
> +            pbmte = pbmte && (env->henvcfg & HENVCFG_PBMTE);
> +        }
> +
>           if (riscv_cpu_sxl(env) == MXL_RV32) {
>               ppn = pte >> PTE_PPN_SHIFT;
> -        } else if (cpu->cfg.ext_svpbmt || cpu->cfg.ext_svnapot) {
> +        } else if (pbmte || cpu->cfg.ext_svnapot) {
>               ppn = (pte & (target_ulong)PTE_PPN_MASK) >> PTE_PPN_SHIFT;
>           } else {
>               ppn = pte >> PTE_PPN_SHIFT;
> @@ -950,7 +956,7 @@ restart:
>           if (!(pte & PTE_V)) {
>               /* Invalid PTE */
>               return TRANSLATE_FAIL;
> -        } else if (!cpu->cfg.ext_svpbmt && (pte & PTE_PBMT)) {
> +        } else if (!pbmte && (pte & PTE_PBMT)) {
>               return TRANSLATE_FAIL;
>           } else if (!(pte & (PTE_R | PTE_W | PTE_X))) {
>               /* Inner PTE, continue walking */