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[PULL 12/53] tcg/i386: Use indexed addressing for softmmu fast path
From: |
Richard Henderson |
Subject: |
[PULL 12/53] tcg/i386: Use indexed addressing for softmmu fast path |
Date: |
Thu, 11 May 2023 09:04:09 +0100 |
Since tcg_out_{ld,st}_helper_args, the slow path no longer requires
the address argument to be set up by the tlb load sequence. Use a
plain load for the addend and indexed addressing with the original
input address register.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/i386/tcg-target.c.inc | 25 ++++++++++---------------
1 file changed, 10 insertions(+), 15 deletions(-)
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index 5d702b69ac..18b0e7997d 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -1837,7 +1837,8 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s,
TCGLabelQemuLdst *l)
tcg_out_sti(s, TCG_TYPE_PTR, (uintptr_t)l->raddr, TCG_REG_ESP, ofs);
} else {
tcg_out_mov(s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[0], TCG_AREG0);
- /* The second argument is already loaded with addrlo. */
+ tcg_out_mov(s, TCG_TYPE_TL, tcg_target_call_iarg_regs[1],
+ l->addrlo_reg);
tcg_out_movi(s, TCG_TYPE_I32, tcg_target_call_iarg_regs[2], oi);
tcg_out_movi(s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[3],
(uintptr_t)l->raddr);
@@ -1910,7 +1911,8 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s,
TCGLabelQemuLdst *l)
tcg_out_st(s, TCG_TYPE_PTR, retaddr, TCG_REG_ESP, ofs);
} else {
tcg_out_mov(s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[0], TCG_AREG0);
- /* The second argument is already loaded with addrlo. */
+ tcg_out_mov(s, TCG_TYPE_TL, tcg_target_call_iarg_regs[1],
+ l->addrlo_reg);
tcg_out_mov(s, (s_bits == MO_64 ? TCG_TYPE_I64 : TCG_TYPE_I32),
tcg_target_call_iarg_regs[2], l->datalo_reg);
tcg_out_movi(s, TCG_TYPE_I32, tcg_target_call_iarg_regs[3], oi);
@@ -2085,16 +2087,6 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext
*s, HostAddress *h,
tcg_out_modrm_offset(s, OPC_CMP_GvEv + trexw,
TCG_REG_L1, TCG_REG_L0, cmp_ofs);
- /*
- * Prepare for both the fast path add of the tlb addend, and the slow
- * path function argument setup.
- */
- *h = (HostAddress) {
- .base = TCG_REG_L1,
- .index = -1
- };
- tcg_out_mov(s, ttype, h->base, addrlo);
-
/* jne slow_path */
tcg_out_opc(s, OPC_JCC_long + JCC_JNE, 0, 0, 0);
ldst->label_ptr[0] = s->code_ptr;
@@ -2111,10 +2103,13 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext
*s, HostAddress *h,
}
/* TLB Hit. */
+ tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_L0, TCG_REG_L0,
+ offsetof(CPUTLBEntry, addend));
- /* add addend(TCG_REG_L0), TCG_REG_L1 */
- tcg_out_modrm_offset(s, OPC_ADD_GvEv + hrexw, h->base, TCG_REG_L0,
- offsetof(CPUTLBEntry, addend));
+ *h = (HostAddress) {
+ .base = addrlo,
+ .index = TCG_REG_L0,
+ };
#else
if (a_bits) {
ldst = new_ldst_label(s);
--
2.34.1
- [PULL 11/53] tcg/i386: Introduce prepare_host_addr, (continued)
- [PULL 11/53] tcg/i386: Introduce prepare_host_addr, Richard Henderson, 2023/05/11
- [PULL 13/53] tcg/aarch64: Introduce prepare_host_addr, Richard Henderson, 2023/05/11
- [PULL 08/53] disas: Move disas.c into the target-independent source set, Richard Henderson, 2023/05/11
- [PULL 14/53] tcg/arm: Introduce prepare_host_addr, Richard Henderson, 2023/05/11
- [PULL 18/53] tcg/riscv: Introduce prepare_host_addr, Richard Henderson, 2023/05/11
- [PULL 09/53] cpu: expose qemu_cpu_list_lock for lock-guard use, Richard Henderson, 2023/05/11
- [PULL 02/53] accel/tcg: Fix atomic_mmu_lookup for reads, Richard Henderson, 2023/05/11
- [PULL 17/53] tcg/ppc: Introduce prepare_host_addr, Richard Henderson, 2023/05/11
- [PULL 06/53] disas: Remove target-specific headers, Richard Henderson, 2023/05/11
- [PULL 10/53] accel/tcg/tcg-accel-ops-rr: ensure fairness with icount, Richard Henderson, 2023/05/11
- [PULL 12/53] tcg/i386: Use indexed addressing for softmmu fast path,
Richard Henderson <=
- [PULL 25/53] tcg/loongarch64: Convert tcg_out_qemu_{ld,st}_slow_path, Richard Henderson, 2023/05/11
- [PULL 26/53] tcg/mips: Convert tcg_out_qemu_{ld,st}_slow_path, Richard Henderson, 2023/05/11
- [PULL 31/53] tcg/mips: Remove MO_BSWAP handling, Richard Henderson, 2023/05/11
- [PULL 34/53] tcg/ppc: Reorg tcg_out_tlb_read, Richard Henderson, 2023/05/11
- [PULL 15/53] tcg/loongarch64: Introduce prepare_host_addr, Richard Henderson, 2023/05/11
- [PULL 21/53] tcg/i386: Convert tcg_out_qemu_ld_slow_path, Richard Henderson, 2023/05/11
- [PULL 22/53] tcg/i386: Convert tcg_out_qemu_st_slow_path, Richard Henderson, 2023/05/11
- [PULL 33/53] tcg/mips: Simplify constraints on qemu_ld/st, Richard Henderson, 2023/05/11
- [PULL 36/53] tcg/ppc: Remove unused constraints A, B, C, D, Richard Henderson, 2023/05/11
- [PULL 16/53] tcg/mips: Introduce prepare_host_addr, Richard Henderson, 2023/05/11