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[PULL 74/80] tcg/aarch64: Remove TARGET_LONG_BITS, TCG_TYPE_TL
From: |
Richard Henderson |
Subject: |
[PULL 74/80] tcg/aarch64: Remove TARGET_LONG_BITS, TCG_TYPE_TL |
Date: |
Tue, 16 May 2023 12:41:39 -0700 |
All uses replaced with TCGContext.addr_type.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/aarch64/tcg-target.c.inc | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index 8d78838796..41838f8170 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -1661,7 +1661,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
TCGReg addr_reg, MemOpIdx oi,
bool is_ld)
{
- TCGType addr_type = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
+ TCGType addr_type = s->addr_type;
TCGLabelQemuLdst *ldst = NULL;
MemOp opc = get_memop(oi);
MemOp s_bits = opc & MO_SIZE;
@@ -1705,7 +1705,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
tcg_out_insn(s, 3502, ADD, 1, TCG_REG_X1, TCG_REG_X1, TCG_REG_X0);
/* Load the tlb comparator into X0, and the fast path addend into X1. */
- tcg_out_ld(s, TCG_TYPE_TL, TCG_REG_X0, TCG_REG_X1,
+ tcg_out_ld(s, addr_type, TCG_REG_X0, TCG_REG_X1,
is_ld ? offsetof(CPUTLBEntry, addr_read)
: offsetof(CPUTLBEntry, addr_write));
tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_X1, TCG_REG_X1,
@@ -1719,18 +1719,17 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext
*s, HostAddress *h,
if (a_mask >= s_mask) {
x3 = addr_reg;
} else {
- tcg_out_insn(s, 3401, ADDI, TARGET_LONG_BITS == 64,
+ tcg_out_insn(s, 3401, ADDI, addr_type,
TCG_REG_X3, addr_reg, s_mask - a_mask);
x3 = TCG_REG_X3;
}
compare_mask = (uint64_t)TARGET_PAGE_MASK | a_mask;
/* Store the page mask part of the address into X3. */
- tcg_out_logicali(s, I3404_ANDI, TARGET_LONG_BITS == 64,
- TCG_REG_X3, x3, compare_mask);
+ tcg_out_logicali(s, I3404_ANDI, addr_type, TCG_REG_X3, x3, compare_mask);
/* Perform the address comparison. */
- tcg_out_cmp(s, TARGET_LONG_BITS == 64, TCG_REG_X0, TCG_REG_X3, 0);
+ tcg_out_cmp(s, addr_type, TCG_REG_X0, TCG_REG_X3, 0);
/* If not equal, we jump to the slow path. */
ldst->label_ptr[0] = s->code_ptr;
--
2.34.1
- [PULL 41/80] tcg/loongarch64: Use atom_and_align_for_opc, (continued)
- [PULL 41/80] tcg/loongarch64: Use atom_and_align_for_opc, Richard Henderson, 2023/05/16
- [PULL 42/80] tcg/mips: Use atom_and_align_for_opc, Richard Henderson, 2023/05/16
- [PULL 44/80] tcg/riscv: Use atom_and_align_for_opc, Richard Henderson, 2023/05/16
- [PULL 46/80] tcg/sparc64: Use atom_and_align_for_opc, Richard Henderson, 2023/05/16
- [PULL 45/80] tcg/s390x: Use atom_and_align_for_opc, Richard Henderson, 2023/05/16
- [PULL 47/80] tcg/i386: Honor 64-bit atomicity in 32-bit mode, Richard Henderson, 2023/05/16
- [PULL 52/80] tcg/s390x: Support 128-bit load/store, Richard Henderson, 2023/05/16
- [PULL 65/80] tcg: Remove TCGv from tcg_gen_atomic_*, Richard Henderson, 2023/05/16
- [PULL 64/80] tcg: Remove TCGv from tcg_gen_qemu_{ld,st}_*, Richard Henderson, 2023/05/16
- [PULL 68/80] tcg/i386: Always enable TCG_TARGET_HAS_extr[lh]_i64_i32, Richard Henderson, 2023/05/16
- [PULL 74/80] tcg/aarch64: Remove TARGET_LONG_BITS, TCG_TYPE_TL,
Richard Henderson <=
- [PULL 56/80] tcg: Widen helper_{ld,st}_i128 addresses to uint64_t, Richard Henderson, 2023/05/16
- [PULL 61/80] tcg: Reduce copies for plugin_gen_mem_callbacks, Richard Henderson, 2023/05/16
- [PULL 43/80] tcg/ppc: Use atom_and_align_for_opc, Richard Henderson, 2023/05/16
- [PULL 48/80] tcg/i386: Support 128-bit load/store with have_atomic16, Richard Henderson, 2023/05/16
- [PULL 50/80] tcg/aarch64: Support 128-bit load/store, Richard Henderson, 2023/05/16
- [PULL 58/80] tcg: Widen tcg_gen_code pc_start argument to uint64_t, Richard Henderson, 2023/05/16
- [PULL 49/80] tcg/aarch64: Rename temporaries, Richard Henderson, 2023/05/16
- [PULL 51/80] tcg/ppc: Support 128-bit load/store, Richard Henderson, 2023/05/16
- [PULL 55/80] accel/tcg: Widen tcg-ldst.h addresses to uint64_t, Richard Henderson, 2023/05/16
- [PULL 54/80] tcg: Widen gen_insn_data to uint64_t, Richard Henderson, 2023/05/16