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Re: [PATCH 2/4] target/ppc: Tidy POWER book4 SPR registration

From: Cédric Le Goater
Subject: Re: [PATCH 2/4] target/ppc: Tidy POWER book4 SPR registration
Date: Mon, 5 Jun 2023 16:58:24 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 
On 6/4/23 01:36, Nicholas Piggin wrote:

POWER book4 (implementation-specific) SPRs are sometimes in their own
functions, but in other cases are mixed with architected SPRs. Do some
spring cleaning on these.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>


Reviewed-by: Cédric Le Goater <clg@kaod.org>

Thanks,

C.



---
  target/ppc/cpu_init.c | 92 ++++++++++++++++++++++++++++---------------
  1 file changed, 60 insertions(+), 32 deletions(-)

diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index e9717b8169..da0f7a7159 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -5374,31 +5374,6 @@ static void register_book3s_ids_sprs(CPUPPCState *env)
                   &spr_read_generic, SPR_NOACCESS,
                   &spr_read_generic, NULL,
                   0x00000000);
-    spr_register_hv(env, SPR_HID0, "HID0",
-                 SPR_NOACCESS, SPR_NOACCESS,
-                 SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, &spr_core_write_generic,
-                 0x00000000);
-    spr_register_hv(env, SPR_TSCR, "TSCR",
-                 SPR_NOACCESS, SPR_NOACCESS,
-                 SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, &spr_write_generic32,
-                 0x00000000);
-    spr_register_hv(env, SPR_HMER, "HMER",
-                 SPR_NOACCESS, SPR_NOACCESS,
-                 SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, &spr_write_hmer,
-                 0x00000000);
-    spr_register_hv(env, SPR_HMEER, "HMEER",
-                 SPR_NOACCESS, SPR_NOACCESS,
-                 SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, &spr_write_generic,
-                 0x00000000);
-    spr_register_hv(env, SPR_TFMR, "TFMR",
-                 SPR_NOACCESS, SPR_NOACCESS,
-                 SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, &spr_write_generic,
-                 0x00000000);
      spr_register_hv(env, SPR_LPIDR, "LPIDR",
                   SPR_NOACCESS, SPR_NOACCESS,
                   SPR_NOACCESS, SPR_NOACCESS,
@@ -5454,11 +5429,6 @@ static void register_book3s_ids_sprs(CPUPPCState *env)
                   SPR_NOACCESS, SPR_NOACCESS,
                   &spr_read_generic, &spr_write_generic,
                   0x00000000);
-    spr_register_hv(env, SPR_LDBAR, "LDBAR",
-                 SPR_NOACCESS, SPR_NOACCESS,
-                 SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, &spr_write_generic,
-                 0x00000000);
  }
static void register_rmor_sprs(CPUPPCState *env) 
@@ -5665,14 +5635,65 @@ static void register_power8_ic_sprs(CPUPPCState *env)
  #endif
  }
+/* SPRs specific to IBM POWER CPUs */ 
+static void register_power_common_book4_sprs(CPUPPCState *env)
+{
+#if !defined(CONFIG_USER_ONLY)
+    spr_register_hv(env, SPR_HID0, "HID0",
+                 SPR_NOACCESS, SPR_NOACCESS,
+                 SPR_NOACCESS, SPR_NOACCESS,
+                 &spr_read_generic, &spr_core_write_generic,
+                 0x00000000);
+    spr_register_hv(env, SPR_TSCR, "TSCR",
+                 SPR_NOACCESS, SPR_NOACCESS,
+                 SPR_NOACCESS, SPR_NOACCESS,
+                 &spr_read_generic, &spr_write_generic32,
+                 0x00000000);
+    spr_register_hv(env, SPR_HMER, "HMER",
+                 SPR_NOACCESS, SPR_NOACCESS,
+                 SPR_NOACCESS, SPR_NOACCESS,
+                 &spr_read_generic, &spr_write_hmer,
+                 0x00000000);
+    spr_register_hv(env, SPR_HMEER, "HMEER",
+                 SPR_NOACCESS, SPR_NOACCESS,
+                 SPR_NOACCESS, SPR_NOACCESS,
+                 &spr_read_generic, &spr_write_generic,
+                 0x00000000);
+    spr_register_hv(env, SPR_TFMR, "TFMR",
+                 SPR_NOACCESS, SPR_NOACCESS,
+                 SPR_NOACCESS, SPR_NOACCESS,
+                 &spr_read_generic, &spr_write_generic,
+                 0x00000000);
+    spr_register_hv(env, SPR_LDBAR, "LDBAR",
+                 SPR_NOACCESS, SPR_NOACCESS,
+                 SPR_NOACCESS, SPR_NOACCESS,
+                 &spr_read_generic, &spr_write_generic,
+                 0x00000000);
+#endif
+}
+
+static void register_power9_book4_sprs(CPUPPCState *env)
+{
+    /* Add a number of P9 book4 registers */
+    register_power_common_book4_sprs(env);
+#if !defined(CONFIG_USER_ONLY)
+    spr_register_kvm(env, SPR_WORT, "WORT",
+                     SPR_NOACCESS, SPR_NOACCESS,
+                     &spr_read_generic, &spr_write_generic,
+                     KVM_REG_PPC_WORT, 0);
+#endif
+}
+
  static void register_power8_book4_sprs(CPUPPCState *env)
  {
      /* Add a number of P8 book4 registers */
+    register_power_common_book4_sprs(env);
  #if !defined(CONFIG_USER_ONLY)
      spr_register_kvm(env, SPR_ACOP, "ACOP",
                       SPR_NOACCESS, SPR_NOACCESS,
                       &spr_read_generic, &spr_write_generic,
                       KVM_REG_PPC_ACOP, 0);
+    /* PID is only in BookE in ISA v2.07 */
      spr_register_kvm(env, SPR_BOOKS_PID, "PID",
                       SPR_NOACCESS, SPR_NOACCESS,
                       &spr_read_generic, &spr_write_pidr,
@@ -5688,10 +5709,12 @@ static void register_power7_book4_sprs(CPUPPCState *env)
  {
      /* Add a number of P7 book4 registers */
  #if !defined(CONFIG_USER_ONLY)
+    register_power_common_book4_sprs(env);
      spr_register_kvm(env, SPR_ACOP, "ACOP",
                       SPR_NOACCESS, SPR_NOACCESS,
                       &spr_read_generic, &spr_write_generic,
                       KVM_REG_PPC_ACOP, 0);
+    /* PID is only in BookE in ISA v2.06 */
      spr_register_kvm(env, SPR_BOOKS_PID, "PID",
                       SPR_NOACCESS, SPR_NOACCESS,
                       &spr_read_generic, &spr_write_generic32,
@@ -5725,6 +5748,11 @@ static void register_power9_mmu_sprs(CPUPPCState *env)
                      SPR_NOACCESS, SPR_NOACCESS,
                      &spr_read_generic, &spr_write_generic,
                      0x0000000000000000);
+    /* PID is part of the BookS ISA from v3.0 */
+    spr_register_kvm(env, SPR_BOOKS_PID, "PID",
+                     SPR_NOACCESS, SPR_NOACCESS,
+                     &spr_read_generic, &spr_write_pidr,
+                     KVM_REG_PPC_PID, 0);
  #endif
  }
@@ -6278,7 +6306,7 @@ static void init_proc_POWER9(CPUPPCState *env) 
      register_power8_dpdes_sprs(env);
      register_vtb_sprs(env);
      register_power8_ic_sprs(env);
-    register_power8_book4_sprs(env);
+    register_power9_book4_sprs(env);
      register_power8_rpr_sprs(env);
      register_power9_mmu_sprs(env);
@@ -6471,7 +6499,7 @@ static void init_proc_POWER10(CPUPPCState *env) 
      register_power8_dpdes_sprs(env);
      register_vtb_sprs(env);
      register_power8_ic_sprs(env);
-    register_power8_book4_sprs(env);
+    register_power9_book4_sprs(env);
      register_power8_rpr_sprs(env);
      register_power9_mmu_sprs(env);
      register_power10_hash_sprs(env);
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