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Re: [PATCH] target/ppc: Implement gathering irq statistics


From: BALATON Zoltan
Subject: Re: [PATCH] target/ppc: Implement gathering irq statistics
Date: Thu, 8 Jun 2023 11:34:22 +0200 (CEST)

On Thu, 8 Jun 2023, Cédric Le Goater wrote:
On 6/7/23 00:02, BALATON Zoltan wrote:
Count exceptions which can be queried with info irq monitor command.

I don't think the TYPE_INTERRUPT_STATS_PROVIDER interface was designed
for CPUs. It is more suitable for interrupt controllers.

True but:
- It works and provides useful statistics
- At least older PPC CPUs have embedded interrupt controller as the comment in cpu.h shows

so is this just a comment, question or you want something changed in this patch?

Regards,
BALATON Zoltan

C.


Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
  target/ppc/cpu.h         |  1 +
  target/ppc/cpu_init.c    | 18 ++++++++++++++++++
  target/ppc/excp_helper.c |  1 +
  3 files changed, 20 insertions(+)

diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index c7c2a5534c..d3a9197e02 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1194,6 +1194,7 @@ struct CPUArchState {
      int error_code;
      uint32_t pending_interrupts;
  #if !defined(CONFIG_USER_ONLY)
+    uint64_t excp_stats[POWERPC_EXCP_NB];
      /*
* This is the IRQ controller, which is implementation dependent and only * relevant when emulating a complete machine. Note that this isn't used
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 05bf73296b..716f2b5d64 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -48,6 +48,7 @@
    #ifndef CONFIG_USER_ONLY
  #include "hw/boards.h"
+#include "hw/intc/intc.h"
  #endif
    /* #define PPC_DEBUG_SPR */
@@ -7123,6 +7124,16 @@ static bool ppc_cpu_is_big_endian(CPUState *cs)
      return !FIELD_EX64(env->msr, MSR, LE);
  }
  +static bool ppc_get_irq_stats(InterruptStatsProvider *obj,
+ uint64_t **irq_counts, unsigned int *nb_irqs)
+{
+    CPUPPCState *env = &POWERPC_CPU(obj)->env;
+
+    *irq_counts = env->excp_stats;
+    *nb_irqs = ARRAY_SIZE(env->excp_stats);
+    return true;
+}
+
  #ifdef CONFIG_TCG
  static void ppc_cpu_exec_enter(CPUState *cs)
  {
@@ -7286,6 +7297,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
      cc->gdb_write_register = ppc_cpu_gdb_write_register;
  #ifndef CONFIG_USER_ONLY
      cc->sysemu_ops = &ppc_sysemu_ops;
+ INTERRUPT_STATS_PROVIDER_CLASS(oc)->get_statistics = ppc_get_irq_stats;
  #endif
        cc->gdb_num_core_regs = 71;
@@ -7323,6 +7335,12 @@ static const TypeInfo ppc_cpu_type_info = {
      .abstract = true,
      .class_size = sizeof(PowerPCCPUClass),
      .class_init = ppc_cpu_class_init,
+#ifndef CONFIG_USER_ONLY
+    .interfaces = (InterfaceInfo[]) {
+          { TYPE_INTERRUPT_STATS_PROVIDER },
+          { }
+    },
+#endif
  };
    #ifndef CONFIG_USER_ONLY
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index fea9221501..5480d9d2c7 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -1652,6 +1652,7 @@ static void powerpc_excp(PowerPCCPU *cpu, int excp)
      qemu_log_mask(CPU_LOG_INT, "Raise exception at " TARGET_FMT_lx
" => %s (%d) error=%02x\n", env->nip, powerpc_excp_name(excp),
                    excp, env->error_code);
+    env->excp_stats[excp]++;
        switch (env->excp_model) {
      case POWERPC_EXCP_40x:



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