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[PATCH] target/loongarch: Fix CSR.DMW0-3.VSEG check
From: |
Jiajie Chen |
Subject: |
[PATCH] target/loongarch: Fix CSR.DMW0-3.VSEG check |
Date: |
Wed, 14 Jun 2023 14:55:56 +0800 |
The previous code checks whether the highest 16 bits of virtual address
equal to that of CSR.DMW0-3. This is incorrect according to the spec,
and is corrected to compare only the highest four bits instead.
Signed-off-by: Jiajie Chen <c@jia.je>
---
target/loongarch/tlb_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/loongarch/tlb_helper.c b/target/loongarch/tlb_helper.c
index cce1db1e0a..6e00190547 100644
--- a/target/loongarch/tlb_helper.c
+++ b/target/loongarch/tlb_helper.c
@@ -185,10 +185,10 @@ static int get_physical_address(CPULoongArchState *env,
hwaddr *physical,
}
plv = kernel_mode | (user_mode << R_CSR_DMW_PLV3_SHIFT);
- base_v = address >> TARGET_VIRT_ADDR_SPACE_BITS;
+ base_v = address >> R_CSR_DMW_VSEG_SHIFT;
/* Check direct map window */
for (int i = 0; i < 4; i++) {
- base_c = env->CSR_DMW[i] >> TARGET_VIRT_ADDR_SPACE_BITS;
+ base_c = FIELD_EX64(env->CSR_DMW[i], CSR_DMW, VSEG);
if ((plv & env->CSR_DMW[i]) && (base_c == base_v)) {
*physical = dmw_va2pa(address);
*prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
--
2.30.2
- [PATCH] target/loongarch: Fix CSR.DMW0-3.VSEG check,
Jiajie Chen <=