[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v3 04/12] accel/tcg/cputlb.c: Widen CPUTLBEntry access functions
From: |
Anton Johansson |
Subject: |
[PATCH v3 04/12] accel/tcg/cputlb.c: Widen CPUTLBEntry access functions |
Date: |
Wed, 21 Jun 2023 15:56:25 +0200 |
Signed-off-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/cputlb.c | 8 ++++----
include/exec/cpu_ldst.h | 10 +++++-----
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 5caeccb52d..ac990a1526 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1453,7 +1453,7 @@ static bool victim_tlb_hit(CPUArchState *env, size_t
mmu_idx, size_t index,
assert_cpu_is_self(env_cpu(env));
for (vidx = 0; vidx < CPU_VTLB_SIZE; ++vidx) {
CPUTLBEntry *vtlb = &env_tlb(env)->d[mmu_idx].vtable[vidx];
- target_ulong cmp = tlb_read_idx(vtlb, access_type);
+ uint64_t cmp = tlb_read_idx(vtlb, access_type);
if (cmp == page) {
/* Found entry in victim tlb, swap tlb and iotlb. */
@@ -1507,7 +1507,7 @@ static int probe_access_internal(CPUArchState *env,
target_ulong addr,
{
uintptr_t index = tlb_index(env, mmu_idx, addr);
CPUTLBEntry *entry = tlb_entry(env, mmu_idx, addr);
- target_ulong tlb_addr = tlb_read_idx(entry, access_type);
+ uint64_t tlb_addr = tlb_read_idx(entry, access_type);
target_ulong page_addr = addr & TARGET_PAGE_MASK;
int flags = TLB_FLAGS_MASK;
@@ -1694,7 +1694,7 @@ bool tlb_plugin_lookup(CPUState *cpu, vaddr addr, int
mmu_idx,
CPUArchState *env = cpu->env_ptr;
CPUTLBEntry *tlbe = tlb_entry(env, mmu_idx, addr);
uintptr_t index = tlb_index(env, mmu_idx, addr);
- vaddr tlb_addr = is_store ? tlb_addr_write(tlbe) : tlbe->addr_read;
+ uint64_t tlb_addr = is_store ? tlb_addr_write(tlbe) : tlbe->addr_read;
if (likely(tlb_hit(tlb_addr, addr))) {
/* We must have an iotlb entry for MMIO */
@@ -1759,7 +1759,7 @@ static bool mmu_lookup1(CPUArchState *env,
MMULookupPageData *data,
target_ulong addr = data->addr;
uintptr_t index = tlb_index(env, mmu_idx, addr);
CPUTLBEntry *entry = tlb_entry(env, mmu_idx, addr);
- target_ulong tlb_addr = tlb_read_idx(entry, access_type);
+ uint64_t tlb_addr = tlb_read_idx(entry, access_type);
bool maybe_resized = false;
/* If the TLB entry is for a different page, reload and try again. */
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
index 896f305ff3..645476f0e5 100644
--- a/include/exec/cpu_ldst.h
+++ b/include/exec/cpu_ldst.h
@@ -328,8 +328,8 @@ static inline void clear_helper_retaddr(void)
#include "tcg/oversized-guest.h"
-static inline target_ulong tlb_read_idx(const CPUTLBEntry *entry,
- MMUAccessType access_type)
+static inline uint64_t tlb_read_idx(const CPUTLBEntry *entry,
+ MMUAccessType access_type)
{
/* Do not rearrange the CPUTLBEntry structure members. */
QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_read) !=
@@ -355,14 +355,14 @@ static inline target_ulong tlb_read_idx(const CPUTLBEntry
*entry,
#endif
}
-static inline target_ulong tlb_addr_write(const CPUTLBEntry *entry)
+static inline uint64_t tlb_addr_write(const CPUTLBEntry *entry)
{
return tlb_read_idx(entry, MMU_DATA_STORE);
}
/* Find the TLB index corresponding to the mmu_idx + address pair. */
static inline uintptr_t tlb_index(CPUArchState *env, uintptr_t mmu_idx,
- target_ulong addr)
+ vaddr addr)
{
uintptr_t size_mask = env_tlb(env)->f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS;
@@ -371,7 +371,7 @@ static inline uintptr_t tlb_index(CPUArchState *env,
uintptr_t mmu_idx,
/* Find the TLB entry corresponding to the mmu_idx + address pair. */
static inline CPUTLBEntry *tlb_entry(CPUArchState *env, uintptr_t mmu_idx,
- target_ulong addr)
+ vaddr addr)
{
return &env_tlb(env)->f[mmu_idx].table[tlb_index(env, mmu_idx, addr)];
}
--
2.41.0
- [PATCH v3 00/12] Start replacing target_ulong with vaddr, Anton Johansson, 2023/06/21
- [PATCH v3 02/12] accel/tcg/translate-all.c: Widen pc and cs_base, Anton Johansson, 2023/06/21
- [PATCH v3 01/12] accel: Replace target_ulong in tlb_*(), Anton Johansson, 2023/06/21
- [PATCH v3 05/12] accel/tcg/cputlb.c: Widen addr in MMULookupPageData, Anton Johansson, 2023/06/21
- [PATCH v3 04/12] accel/tcg/cputlb.c: Widen CPUTLBEntry access functions,
Anton Johansson <=
- [PATCH v3 03/12] target: Widen pc/cs_base in cpu_get_tb_cpu_state, Anton Johansson, 2023/06/21
- [PATCH v3 08/12] accel: Replace target_ulong with vaddr in probe_*(), Anton Johansson, 2023/06/21
- [PATCH v3 06/12] accel/tcg/cpu-exec.c: Widen pc to vaddr, Anton Johansson, 2023/06/21
- [PATCH v3 07/12] accel/tcg: Widen pc to vaddr in CPUJumpCache, Anton Johansson, 2023/06/21
- [PATCH v3 09/12] accel/tcg: Replace target_ulong with vaddr in *_mmu_lookup(), Anton Johansson, 2023/06/21
- [PATCH v3 10/12] accel/tcg: Replace target_ulong with vaddr in translator_*(), Anton Johansson, 2023/06/21
- [PATCH v3 11/12] accel/tcg: Replace target_ulong with vaddr in page_*(), Anton Johansson, 2023/06/21
- [PATCH v3 12/12] cpu: Replace target_ulong with hwaddr in tb_invalidate_phys_addr(), Anton Johansson, 2023/06/21