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Re: [PATCH v2 08/18] target/riscv: handle mvendorid/marchid/mimpid for K
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From: |
Alistair Francis |
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Subject: |
Re: [PATCH v2 08/18] target/riscv: handle mvendorid/marchid/mimpid for KVM CPUs |
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Date: |
Thu, 22 Jun 2023 11:16:41 +1000 |
On Wed, Jun 14, 2023 at 7:00 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> After changing user validation for mvendorid/marchid/mimpid to guarantee
> that the value is validated on user input time, coupled with the work in
> fetching KVM default values for them by using a scratch CPU, we're
> certain that the values in cpu->cfg.(mvendorid|marchid|mimpid) are
> already good to be written back to KVM.
>
> There's no need to write the values back for 'host' type CPUs since the
> values can't be changed, so let's do that just for generic CPUs.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/kvm.c | 31 +++++++++++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
> index cd2974c663..602727cdfd 100644
> --- a/target/riscv/kvm.c
> +++ b/target/riscv/kvm.c
> @@ -495,6 +495,33 @@ void kvm_arch_init_irq_routing(KVMState *s)
> {
> }
>
> +static int kvm_vcpu_set_machine_ids(RISCVCPU *cpu, CPUState *cs)
> +{
> + CPURISCVState *env = &cpu->env;
> + uint64_t id;
> + int ret;
> +
> + id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
> + KVM_REG_RISCV_CONFIG_REG(mvendorid));
> + ret = kvm_set_one_reg(cs, id, &cpu->cfg.mvendorid);
> + if (ret != 0) {
> + return ret;
> + }
> +
> + id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
> + KVM_REG_RISCV_CONFIG_REG(marchid));
> + ret = kvm_set_one_reg(cs, id, &cpu->cfg.marchid);
> + if (ret != 0) {
> + return ret;
> + }
> +
> + id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
> + KVM_REG_RISCV_CONFIG_REG(mimpid));
> + ret = kvm_set_one_reg(cs, id, &cpu->cfg.mimpid);
> +
> + return ret;
> +}
> +
> int kvm_arch_init_vcpu(CPUState *cs)
> {
> int ret = 0;
> @@ -513,6 +540,10 @@ int kvm_arch_init_vcpu(CPUState *cs)
> }
> env->misa_ext = isa;
>
> + if (!object_dynamic_cast(OBJECT(cpu), TYPE_RISCV_CPU_HOST)) {
> + ret = kvm_vcpu_set_machine_ids(cpu, cs);
> + }
> +
> return ret;
> }
>
> --
> 2.40.1
>
>
- [PATCH v2 02/18] hw/riscv/virt.c: skip 'mmu-type' FDT if satp mode not set, (continued)
- [PATCH v2 02/18] hw/riscv/virt.c: skip 'mmu-type' FDT if satp mode not set, Daniel Henrique Barboza, 2023/06/13
- [PATCH v2 03/18] target/riscv/cpu.c: restrict 'mvendorid' value, Daniel Henrique Barboza, 2023/06/13
- [PATCH v2 04/18] target/riscv/cpu.c: restrict 'mimpid' value, Daniel Henrique Barboza, 2023/06/13
- [PATCH v2 05/18] target/riscv/cpu.c: restrict 'marchid' value, Daniel Henrique Barboza, 2023/06/13
- [PATCH v2 06/18] target/riscv: use KVM scratch CPUs to init KVM properties, Daniel Henrique Barboza, 2023/06/13
- [PATCH v2 07/18] target/riscv: read marchid/mimpid in kvm_riscv_init_machine_ids(), Daniel Henrique Barboza, 2023/06/13
- [PATCH v2 08/18] target/riscv: handle mvendorid/marchid/mimpid for KVM CPUs, Daniel Henrique Barboza, 2023/06/13
- Re: [PATCH v2 08/18] target/riscv: handle mvendorid/marchid/mimpid for KVM CPUs,
Alistair Francis <=
- [PATCH v2 09/18] linux-headers: Update to v6.4-rc1, Daniel Henrique Barboza, 2023/06/13
- [PATCH v2 10/18] target/riscv/kvm.c: init 'misa_ext_mask' with scratch CPU, Daniel Henrique Barboza, 2023/06/13
- [PATCH v2 11/18] target/riscv/cpu: add misa_ext_infos[], Daniel Henrique Barboza, 2023/06/13
- [PATCH v2 12/18] target/riscv: add KVM specific MISA properties, Daniel Henrique Barboza, 2023/06/13
- [PATCH v2 13/18] target/riscv/kvm.c: update KVM MISA bits, Daniel Henrique Barboza, 2023/06/13