Re: [PATCH v2 0/3] target/i386: allow using named CPU modeles with user mode emulation

[Daniel P . Berrangé]

On Mon, Jun 26, 2023 at 10:33:14AM +0200, Paolo Bonzini wrote:
> When running qemu-i386 even with -cpu Nehalem (aka x86_64-v2), it raises the
> warning
> 
>   TCG doesn't support requested feature: CPUID.80000001H:EDX.lm [bit 29]
>
> Likewise using qemu-x86_64 with -cpu Haswell, it raises warnings for
> 
>   TCG doesn't support requested feature: CPUID.01H:ECX.pcid [bit 17]
>   TCG doesn't support requested feature: CPUID.01H:ECX.x2apic [bit 21]
>   TCG doesn't support requested feature: CPUID.01H:ECX.tsc-deadline [bit 24]
>   TCG doesn't support requested feature: CPUID.07H:EBX.invpcid [bit 10]
> 
> Even though x86_64-v3 is the level that qemu-user is supposed to provide.

> These are two related problems:
> 
> - for Haswell, the 4 missing features are only relevant to code running
>   in kernel mode; we can ignore them and mark them as supported even
>   though they are not.  The supported features are only used to print
>   the warnings
> 
> - for qemu-i386, the issue is that this emulator is restricted to running
>   programs on a 32-bit processor, even though it is actually emulating
>   programs that use the 32-bit kernel ABI on any processor.  The behavior
>   the processor in compatibility (32-bit CS, EFER.LMA=1) mode is mostly
>   the same as when EFER.LMA=0 and the little code that is needed to handle
>   64-bit ring-0 is even present in the qemu-i386 binary, just hidden
>   behind checks for HF_LMA_MASK.  So, LM can also be treated as a feature
>   that is only relevant in kernel mode; not entirely, so this cannot yet
>   be extended to bsd-user, but the required changes are minimal.

IMHO in this case we should hard block all named CPUs with
'lm' set from qemu-i386. It only makes sense to use named CPU
models that were actually from the 32-bit era with qemu-i386.

If someone wants Nehalem then they should be using qemu-x86_64.
If someone wants qemu-i386 then they should be using an older
named CPU model predating 'lm'.


With regards,
Daniel
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