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[PATCH 03/16] target/riscv: Restrict sysemu specific header to user emul
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From: |
Philippe Mathieu-Daudé |
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Subject: |
[PATCH 03/16] target/riscv: Restrict sysemu specific header to user emulation |
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Date: |
Tue, 27 Jun 2023 01:19:54 +0200 |
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/riscv/cpu.c | 8 +++++---
target/riscv/cpu_helper.c | 2 ++
target/riscv/csr.c | 2 ++
3 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 4035fe0e62..175dbc9826 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -23,9 +23,13 @@
#include "qemu/log.h"
#include "cpu.h"
#include "cpu_vendorid.h"
+#ifndef CONFIG_USER_ONLY
#include "pmu.h"
-#include "internals.h"
#include "time_helper.h"
+#include "sysemu/kvm.h"
+#include "kvm_riscv.h"
+#endif
+#include "internals.h"
#include "exec/exec-all.h"
#include "qapi/error.h"
#include "qapi/visitor.h"
@@ -33,8 +37,6 @@
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
#include "fpu/softfloat-helpers.h"
-#include "sysemu/kvm.h"
-#include "kvm_riscv.h"
#include "tcg/tcg.h"
/* RISC-V CPU definitions */
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 90cef9856d..d871718e5d 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -28,7 +28,9 @@
#include "tcg/tcg-op.h"
#include "trace.h"
#include "semihosting/common-semi.h"
+#ifndef CONFIG_USER_ONLY
#include "sysemu/cpu-timers.h"
+#endif
#include "cpu_bits.h"
#include "debug.h"
#include "tcg/oversized-guest.h"
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 58499b5afc..936ba2be24 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -21,8 +21,10 @@
#include "qemu/log.h"
#include "qemu/timer.h"
#include "cpu.h"
+#ifndef CONFIG_USER_ONLY
#include "pmu.h"
#include "time_helper.h"
+#endif
#include "qemu/main-loop.h"
#include "exec/exec-all.h"
#include "exec/tb-flush.h"
--
2.38.1
- [PATCH 00/16] target/riscv: Allow building without TCG (KVM-only so far), Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 01/16] target/riscv: Remove unused 'instmap.h' header in translate.c, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 02/16] target/riscv: Restrict KVM-specific fields from ArchCPU, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 03/16] target/riscv: Restrict sysemu specific header to user emulation,
Philippe Mathieu-Daudé <=
- [PATCH 04/16] target/riscv: Restrict 'rv128' machine to TCG accelerator, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 05/16] target/riscv: Move sysemu-specific files to target/riscv/sysemu/, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 06/16] target/riscv: Restrict riscv_cpu_do_interrupt() to sysemu, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 07/16] target/riscv: Move TCG-specific files to target/riscv/tcg/, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 08/16] target/riscv: Move TCG-specific cpu_get_tb_cpu_state() to tcg/cpu.c, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 09/16] target/riscv: Expose some 'trigger' prototypes from debug.c, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 10/16] target/riscv: Extract TCG-specific code from debug.c, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 11/16] target/riscv: Move sysemu-specific debug files to target/riscv/sysemu/, Philippe Mathieu-Daudé, 2023/06/26
- [PATCH 12/16] target/riscv: Expose riscv_cpu_pending_to_irq() from cpu_helper.c, Philippe Mathieu-Daudé, 2023/06/26
- [RFC PATCH 13/16] target/riscv: Move TCG/sysemu-specific code to tcg/sysemu/cpu_helper.c, Philippe Mathieu-Daudé, 2023/06/26