I thought we dropped this patch until we could do something with TLB
accesses.
I did suggest something like:
--8<---------------cut here---------------start------------->8---
modified include/hw/core/cpu.h
@@ -80,10 +80,24 @@ DECLARE_CLASS_CHECKERS(CPUClass, CPU,
typedef struct ArchCPU CpuInstanceType; \
OBJECT_DECLARE_TYPE(ArchCPU, CpuClassType, CPU_MODULE_OBJ_NAME);
+/**
+ * typedef MMUAccessType - describe the type of access for cputlb
+ *
+ * When handling the access to memory we need to know the type of
+ * access we are doing. Loads and store rely on read and write page
+ * permissions where as the instruction fetch relies on execute
+ * permissions. Additional bits are used for TLB access so we can
+ * suppress instrumentation of memory when the CPU is probing.
+ */
typedef enum MMUAccessType {
MMU_DATA_LOAD = 0,
MMU_DATA_STORE = 1,
- MMU_INST_FETCH = 2
+ MMU_INST_FETCH = 2,
+ /* MMU Mask */
+ MMU_VALID_MASK = (MMU_DATA_LOAD | MMU_DATA_STORE | MMU_INST_FETCH),
+ /* Represents the CPU walking the page table */
+ MMU_TLB_ACCESS = 0x4,
+ MMU_TLB_LOAD = MMU_DATA_LOAD | MMU_TLB_ACCESS
} MMUAccessType;
typedef struct CPUWatchpoint CPUWatchpoint;
modified accel/tcg/cputlb.c
@@ -1503,11 +1503,12 @@ static void notdirty_write(CPUState *cpu, vaddr
mem_vaddr, unsigned size,
}
static int probe_access_internal(CPUArchState *env, target_ulong addr,
- int fault_size, MMUAccessType access_type,
+ int fault_size, MMUAccessType
full_access_type,
int mmu_idx, bool nonfault,
void **phost, CPUTLBEntryFull **pfull,
uintptr_t retaddr)
{
+ MMUAccessType access_type = full_access_type & MMU_VALID_MASK;
uintptr_t index = tlb_index(env, mmu_idx, addr);
CPUTLBEntry *entry = tlb_entry(env, mmu_idx, addr);
target_ulong tlb_addr = tlb_read_idx(entry, access_type);
@@ -1546,7 +1547,9 @@ static int probe_access_internal(CPUArchState *env,
target_ulong addr,
/* Fold all "mmio-like" bits into TLB_MMIO. This is not RAM. */
if (unlikely(flags & ~(TLB_WATCHPOINT | TLB_NOTDIRTY))
||
- (access_type != MMU_INST_FETCH &&
cpu_plugin_mem_cbs_enabled(env_cpu(env)))) {
+ (access_type != MMU_INST_FETCH &&
+ !(full_access_type & MMU_TLB_ACCESS) &&
+ cpu_plugin_mem_cbs_enabled(env_cpu(env)))) {
*phost = NULL;
return TLB_MMIO;
}
--8<---------------cut here---------------end--------------->8---
and then we can apply MMU_TLB_LOAD as the type in the page walking code.
I wanted to know if that was the sort of thing you where thinking off or
if that is too ugly.