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[PATCH 0/2] improve accuracy in riscv-pmp
From: |
Ruibo Lu |
Subject: |
[PATCH 0/2] improve accuracy in riscv-pmp |
Date: |
Wed, 28 Jun 2023 15:22:59 +0800 |
Based-on: 4329d049d5b8d4af71c6b399d64a6d1b98856318
Ruibo Lu (2):
target/riscv: Remove redundant check in pmp_is_locked
target/riscv: Optimize ambiguous local variable in pmp_hart_has_privs
target/riscv/pmp.c | 25 ++++++++++---------------
1 file changed, 10 insertions(+), 15 deletions(-)
--
2.41.0
>From 6780c552b3b4c1b8d6d8d5b17d4054c5f24ad062 Mon Sep 17 00:00:00 2001
From: Ruibo Lu <reaperlu@hust.edu.cn>
Date: Wed, 28 Jun 2023 11:07:33 +0800
Subject: [PATCH 1/2] target/riscv: Remove redundant check in pmp_is_locked
the check of top PMP is redundant and will not influence the return
value, so consider remove it
Signed-off-by: Ruibo Lu <reaperlu@hust.edu.cn>
---
target/riscv/pmp.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index 9d8db493e6..1a9279ba88 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -49,11 +49,6 @@ static inline int pmp_is_locked(CPURISCVState *env, uint32_t
pmp_index)
return 1;
}
- /* Top PMP has no 'next' to check */
- if ((pmp_index + 1u) >= MAX_RISCV_PMPS) {
- return 0;
- }
-
return 0;
}
--
2.41.0
>From 7174d9fb96f5e5dcde41d74b4270216286b9bb3d Mon Sep 17 00:00:00 2001
From: Ruibo Lu <reaperlu@hust.edu.cn>
Date: Wed, 28 Jun 2023 11:19:38 +0800
Subject: [PATCH 2/2] target/riscv: Optimize ambiguous local variable in
pmp_hart_has_privs
These two values represents whether start/end address is in pmp_range.
However, the type and name of them is ambiguous. This commit change the
name and type of them to improve code readability and accuracy.
Signed-off-by: Ruibo Lu <reaperlu@hust.edu.cn>
---
target/riscv/pmp.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index 1a9279ba88..aa573bab14 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -203,16 +203,16 @@ void pmp_update_rule_nums(CPURISCVState *env)
}
}
-static int pmp_is_in_range(CPURISCVState *env, int pmp_index,
+static bool pmp_is_in_range(CPURISCVState *env, int pmp_index,
target_ulong addr)
{
- int result = 0;
+ int result = false;
if ((addr >= env->pmp_state.addr[pmp_index].sa) &&
(addr <= env->pmp_state.addr[pmp_index].ea)) {
- result = 1;
+ result = true;
} else {
- result = 0;
+ result = false;
}
return result;
@@ -287,8 +287,8 @@ bool pmp_hart_has_privs(CPURISCVState *env, target_ulong
addr,
{
int i = 0;
int pmp_size = 0;
- target_ulong s = 0;
- target_ulong e = 0;
+ bool sa_in = 0;
+ bool ea_in = 0;
/* Short cut if no rules */
if (0 == pmp_get_num_rules(env)) {
@@ -314,11 +314,11 @@ bool pmp_hart_has_privs(CPURISCVState *env, target_ulong
addr,
* from low to high
*/
for (i = 0; i < MAX_RISCV_PMPS; i++) {
- s = pmp_is_in_range(env, i, addr);
- e = pmp_is_in_range(env, i, addr + pmp_size - 1);
+ sa_in = pmp_is_in_range(env, i, addr);
+ ea_in = pmp_is_in_range(env, i, addr + pmp_size - 1);
/* partially inside */
- if ((s + e) == 1) {
+ if (sa_in ^ ea_in) {
qemu_log_mask(LOG_GUEST_ERROR,
"pmp violation - access is partially inside\n");
*allowed_privs = 0;
@@ -339,7 +339,7 @@ bool pmp_hart_has_privs(CPURISCVState *env, target_ulong
addr,
(env->pmp_state.pmp[i].cfg_reg & PMP_WRITE) |
((env->pmp_state.pmp[i].cfg_reg & PMP_EXEC) >> 2);
- if (((s + e) == 2) && (PMP_AMATCH_OFF != a_field)) {
+ if ((sa_in & ea_in) && (PMP_AMATCH_OFF != a_field)) {
/*
* If the PMP entry is not off and the address is in range,
* do the priv check
--
2.41.0
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